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JSSC 2024第12期Digital Circuits0.18µm CMOSNeural Network Accelerator

A 0.00055% THD + N Class-D Audio Amplifier With Capacitive Feedforward PWM and Wide-Band

提出一种采用电容前馈PWM和宽带线性增强技术的D类音频放大器,显著降低失真和噪声。
THD + N 0.00055% (−105.2 dB), FoM THD + N 2119, 静态电流 0.81 mA
D类放大器PWM线性度THD+N抗混叠滤波器
创新点1:输入前馈载波技术(方法创新) - 通过引入输入前馈载波,有效降低了环路滤波器的摆幅和比较器延迟耦合,显著提升了线性度,解决了传统闭环PWM的固有缺陷。
创新点2:二阶PWM残留混叠抑制技术(系统创新) - 采用二阶PRAR技术结合环路补偿,实现了更陡峭的滤波特性和宽频带线性度改善,THD+N低至0.00055%(-105.2 dB)。
创新点3:全被动抗混叠滤波器(电路创新) - 使用全被动结构抑制PWM残留泄漏,无需额外功耗,在0.18-µm CMOS工艺下实现了高线性度和低静态电流(0.81 mA)。
创新点4:宽频带线性度增强(系统创新) - 通过综合前馈和PRAR技术,在20-20 kHz音频带宽内THD+N始终低于-100 dB,展现了卓越的宽频带性能。
Abstract
Linearity of Class-D audio amplifier based on conventional closed-loop pulsewidth modulat ion (PWM) is deteriorated by large swing of loop filter and input-dependent comparator delay. Furthermore, PWM-residual-aliasing has been revealed as a source of distortion, especially in low-power filter- less structure. This article presents a class-D amplifier (CDA) that utilizes an input-feedforward carrier to mitigate both loop filter swing and comparator delay coupling. As for the PWM- residual-aliasing, we propose a 2nd-order PWM-residual-aliasing reduction (PRAR) technique with loop compensation to achieve steeper filtering and wide-band linearity improvement. In addi- tion, a fully passive anti-aliasing filter is used to suppress the PWM residue leakage. This CDA was fabricated in a 0.18-µm CMOS 5 V process. It achieves a state-of-the-art total harmonic distortion plus noise (THD + N) of 0.00055% (−105.2 dB) and an FoM THD + N of 2119 while consuming a low quiescent current of 0.81 mA. Thanks to the wide-band-effective linearity enhancement, the THD + N across 20–20-kHz audio bandwidth is less than −100 dB.