JSSC 2024第12期Data Converters180nm BCDDACNeural Network Accelerator

A 1217-dB DR and 1090-dB THD N Filterless Digital-Input Class-D Amplifier With a

提出一种高压无滤波器数字输入D类放大器，动态范围达121.7 dB。

121.7 dB DR, -109.0 dB THD+N, 14 W, 90%效率

D类放大器动态范围高压IDAC实时动态元件匹配功率效率

▸创新点1：高压IDAC直接驱动CDA（电路创新）：通过高压IDAC直接驱动高压CDA，避免了传统设计中因DAC与CDA共模电平差异导致的噪声损失，显著提升了动态范围（DR）至121.7 dB。

▸创新点2：过渡率平衡双向实时动态元件匹配技术（方法创新）：引入RTDEM技术，有效解决了IDAC中因失配和符号间干扰（ISI）引起的失真问题，显著降低了THD+N，分别达到-104.0 dB（1 kHz）和-109.0 dB（6 kHz）。

▸创新点3：相同输出共模避免噪声损失（系统创新）：通过将DAC与CDA的输出共模保持一致，避免了共模电平转换带来的噪声损失，进一步提升了系统的整体性能。

▸创新点4：高效率功率输出（电路创新）：该设计在180-nm BCD工艺下实现，能够在8Ω负载下输出最大14 W功率，且功率效率高达90%，展示了其在高效音频放大领域的潜力。

Abstract

The dynamic range (DR) of digital-input closed- loop class-D amplifiers (CDAs) is typically limited by the noise introduced by their resistive DAC (RDAC) or current-steering DAC (IDAC). It could be improved by using tri-level cells in the IDAC, but this has not yet been realized in high-voltage (HV) CDAs due to the large difference in the common-mode levels between the DAC and the CDA. This article describes an HV CDA directly driven by an HV IDAC. By using the same output common mode for the di