A Tri-Band Dual-Concurrent Wi-Fi 802.11be Transceiver Achieving −46 dB TX/RX EVM Floor at 7.1 GHz for a 4 K-QAM 320 MHz Signal Jongsoo Lee , Jaehyuk Jang, Wooseok Lee, Bosung Suh, Heeyong Yoo

Abstract

A high-linearity, wideband transceiver for Wi-Fi 7 to support 4 K-QAM 320 MHz bandwidth (BW) is pre- sented and fabricated using a 14 nm Fin-FET CMOS process. To provide a high-performance local oscillator (LO) signal, a fractional-N sampling phase-locked loop with a high gain sampling phase detector (SPD) is implemented with digital-to- time converter (DTC) non-linearity calibration (NLC) based on a least mean square (LMS) algorithm. The transceiver exhibits excellent integrated phase noise (IPN) performances with a single- core voltage-controlled oscillator (VCO) achieving −54.3 dBc at 7115 MHz frequency channel. IPN performance can be further improved to −55.2 dBc with a dual-core VCO. A wideband frequency operation transmitter (TX) architecture for a 5–7 GHz frequency range is introduced. It utilizes a high Q tunable switched inductor for a wideband matching network and flexible frequency adjustment. A coupling-minimized switched inductor (CMSI) is implemented to cancel out magnetic flux when two inductors are enabled simultaneously. This improves mutual inductance and the Q factor while extending the frequency tuning range. The TX error vector magnitude (TX EVM) floor is achieved up to −46.1 dB at 7.1 GHz, marking the best-reported value to date. A 5/6G receiver (RX) is designed to improve noise performance while maintaining linearity. To achieve this, a resis- tor attenuator block is introduced between a voltage-to-current (V2I) and a mixer, while a high signal-to-noise