← 返回 JSSC 论文列表JSSC 2024第12期Power Management180nm
III C IRCUIT IMPLEMENTATION The circuit diagram of the converter is depicted in
该论文提出了一种采用180nm BCD技术的浮动栅驱动策略,用于多电源开关的集成电路设计。
180nm BCD技术
浮动栅驱动BCD技术引导驱动电源开关集成电路
▸创新点1:pMOS基堆叠式引导驱动方法,通过高侧晶体管从相邻低侧晶体管获取能量,形成能量传递环路,显著提升驱动效率。
▸创新点2:浮动开关的紧凑高效驱动方案,采用pMOS堆叠引导驱动,确保多个浮动晶体管从地参考VDD正确驱动,减少电路复杂性。
▸创新点3:引导操作重复利用驱动信号,避免功率开关和引导pMOS同时导通,优化了时序控制,提高了系统可靠性。
▸创新点4:精心设计引导电容,考虑功耗、路径电阻和引导时间等因素,确保浮动晶体管的实际驱动电压稳定,提升系统性能。
Abstract
with their corresponding
gate drivers and level shifters onto a single die using 180 nm
BCD technology. On the other hand, all passive components,
including the PR, flying capacitors, and bootstrap capacitors,
are implemented off-chip. Additionally, due to the complexity
of the control timing, off-chip digital control is utilized.
A. Floating Gate Driving Strategy
In this design, all of the power switches in the DSPPR
are implemented by on-chip nMOS transistors, as shown
in Fig. 4. Since multipl