Hybrid SRAMROM Compute-in-Memory Architecture for High Task-Level Energy Efficie

Abstract

This article reports the first ultra-high-density hybrid static random access memory (SRAM)/read-only mem- ory (ROM) compute-in-memory (CiM) architecture for multibit multiply-accumulate (MAC) operations of transformer models. It features several techniques that enhance the on-chip weight density, energy efficiency, and flexibility, namely: 1) the hybrid CiM structure of 6T SRAM and 1T multi-level cell (MLC) ROM for ultra-high memory density to improve the limited on-chip memory capacity and all