JSSC 2025第11期Data Converters

A 470-µW, 102.6-dB DR, 20-kHz BW Calibration-Free ΔΣ Modulator With SFDR in Excess of 110 dBc Using an Intrinsically Linear 13-Level DAC Matteo Dalla Longa

首款无需校准或动态元件匹配的13级DAC ΔΣ调制器，SFDR超过110 dBc。

1.8V, 470µW, 102.6dB DR, 100.7dB SNDR, 20kHz BW

ΔΣ调制器高线性度DAC动态范围低功耗

▸无需动态元件匹配(DEM)或校准

▸采用13级固有线性DAC

▸电容和参考电压失配仅为二阶非线性源

Abstract

This article presents the first true multi-bit discrete- time ΔΣ modulator (DTΔΣM) to achieve a spurious-free dynamic range (SFDR) in excess of 110 dBc without the need for dynamic element-matching (DEM) or calibration. This high linearity is obtained by employing a 13-level intrinsically linear digital-to-analog converter (DAC) where capacitor and reference voltage mismatches are only second-order sources of non- linearity. The linearity performance is validated across multiple samples and over