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An 8.62-µW 75-dB DR SoC Fully Integrated SoC for Spoken
一款超低功耗全集成语音理解SoC，具备75dB动态范围和92.9%识别准确率
65nm CMOS, 8.62µW功耗, 2.23mm²面积, 93dB DR, 92.9%准确率
语音理解SoC动态范围扩展RNN加速器硬件感知训练低功耗设计
▸采用全局/通道级自动增益控制扩展动态范围
▸利用时序稀疏性和池化技术降低RNN加速器功耗2.3倍
▸结合硬件感知训练与行为模型克服芯片间差异
Abstract
We present a sub-10-µW fully integrated SoC for on-
device spoken language understanding (SLU). Its analog feature
extractor (FEx) applies global and per-channel automatic gain
control (AGC) to extend the system’s dynamic range (DR)—a
critical requirement for real-world scenarios, including far-field
operations. The on-chip streaming-mode recurrent neural net-
work (RNN) accelerator exploits temporal sparsity and pooling,
reducing its power by 2 .3×. By combining hardware-aware
training with a be