A 46-GHz 545-fs rms PLL-XO Co-Design Featuring a Pulse-Injection XO Driver Can L

Abstract

This article presents a power-e fficient and low-jitter frequency generation and synthesis architecture that leverages a phase-locked loop (PLL) and crystal oscillator (XO) co-design, integrated with a pulse-injection XO driver. The proposed co- design exploits the low-jitter and fine phase resolution of the PLL output to inject energy into the XO precisely at low-impulse- sensitivity-function (ISF) points, enhancing XO performance and subsequently reducing the in-band phase noise of the PLL. In ad