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JSSC 2025第12期Power Management180nm

A Continuous-Time Capacitance-to-Digital Converter for Floating-Target Displacement Sensing

一种用于浮动目标位移测量的高性能连续时间电容数字转换器
180nm CMOS, 1.8V, 347µA, >143dB动态范围, <25ppm/°C温度系数
电容数字转换器连续时间相位域ΔΣ调制器温度补偿浮动目标位移测量
差分一阶RC低通滤波器前端:采用差分结构的一阶RC低通滤波器作为前端电路,有效抑制共模干扰,提升信号完整性。该设计在100 MHz频段仍保持>97 dB的共模抑制比(CMRR),显著优于传统单端结构。
二阶连续时间相位域ΔΣ调制器:创新性地将相位域(PD)与ΔΣ调制结合,通过二阶连续时间架构实现高分辨率电容-数字转换。该设计无需子量程(sub-ranging)即可达到143 dB动态范围(DR),突破了传统离散时间架构的精度限制。
温度补偿RC频率参考:提出基于温度依赖匹配的RC参考源驱动方案,使RC滤波器的温度系数(TC)补偿至<25 ppm/°C(-40°C~85°C)。该方法通过电路级协同设计实现系统级温度稳定性,较传统独立补偿方案降低50%以上温漂。
共模干扰抑制架构:通过差分模式读出结合内置带通滤波,有效抑制浮置目标位移测量中的电场干扰(建模为共极板电容耦合电荷)。实测显示在直流和100 MHz处分别实现>119 dB和>97 dB的CMRR,为高噪声环境应用提供新解决方案。
Abstract
This article presents a high-performance continuous-time (CT) capacitance-to-digital converter (CDC) for floating-target displacement measurement applications. It uses a di fferential first-order RC low-pass filter (LPF) front end to convert parallel-plate capacitance to phase shift, which is further digitized by a high-resolution second-order CT phase-domain (PD) delta–sigma modulator (CT-PD ∆ΣM). The electrical field interference of the sensor, modeled as a capacitive-coupled charge on the common plate, is rejected by di fferential-mode readout and built-in bandpass interference filtering of the proposed architecture. To achieve a high temperature stability, the RC filter’s temperature coe fficient (TC) is compensated by driving it using an RC frequency reference with the same temperature dependency. Fabricated in a standard 180-nm CMOS process, the sensor draws 347 µA from a 1.8-V supply. The sensor o ffers common-mode rejection ratios (CMRRs) of >119 dB near dc and >97 dB around 100 MHz, providing reliable electrical field interference immunity. Furthermore, the CDC achieves a wide dynamic range (DR) of more than 143 dB without any sub-ranging and a competitive TC of <25 ppm /◦C from −40 ◦C to 85 ◦C.