A Cryo-CMOS 800-MS /s 7-bit Charge-Injection SAR ADC With Only 4-fF Input Capacitance and 64-dB SFDR in 40-nm Bulk CMOS

Abstract

This article presents a cryogenic CMOS (cryo- CMOS) 800-MS /s 7-bit analog-to-digital converter (ADC) with an input capacitance of only 4 fF, which is >13× lower than the prior art. This small capacitance is enabled by its charge-injection digital-to-analog converter (CI-DAC), which maximally exploits the low thermal noise in the cryogenic environment. Despite its small input capacitance, this ADC maintains a high linearity by: 1) implementing a split CI-DAC with a bidirectional charge flow, whic