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A Filter-Embedded Pipe-SAR ADC With Progressive Conversion and Floating Charge T
提出一种嵌入式滤波器的流水线SAR ADC架构,具有高效率和宽带宽特性。
28nm CMOS, 70.1-dB SNDR, 80-MHz带宽, 4.9mW功耗, 172.2dB FoM
滤波器嵌入式ADC流水线SAR渐进式转换浮动电荷传输器无线接收器
▸渐进式转换技术提高速度
▸浮动电荷传输器(FCT)新型放大器
▸并行化滤波与量化阶段
Abstract
This article presents a filter-embedded pipelined
successive-approximation (SAR) (pipe-SAR) analog-to-digital
converter (ADC) architecture that achieves high e fficiency and
wide bandwidth for next-generation wireless applications. A
progressive conversion technique is proposed to improve the
conversion speed of filter-embedded SAR ADCs by parallelizing
the filtering and SAR quantization phases, which also pro-
vides a more process–voltage–temperature (PVT)-robust and
clock-scalable transfer function