ISSCC 2018

2018

205 篇论文 · Wireless (27) · RF & Wireless (23) · Wireline I/O (18) · AI / ML (17)

ISSCC 2018 Session 31 AI / ML
Conv-RAM: An Energy-Efficient SRAM with Embedded Convolution Computation for Low-Power CNN-Based Machine Learning Applications
Avishek Biswas, Anantha P. Chandrakasan, charge-sharing is used to integrate the lower of the 2 voltage rails with a ref
local column that replicates the local bit-line capacitance. This process continues until the voltage of the rail being integrated exceeds the other one, at which point the SA output flips. This signals conversion comple
ISSCC 2018 Session 31 AI / ML
A 42pJ/Decision 3.12TOPS/W Robust In-Memory Machine Learning Classifier with On-Chip Training
Sujan Kumar Gonugondla, Mingu Kang, Naresh Shanbhag
Embedded sensory systems (Fig. 31.2.1) continuously acquire and process data for inference and decision-making purposes under stringent energy constraints. These always-ON systems need to track changing data statistics a
ISSCC 2018 Session 31 AI / ML
Brain-Inspired Computing Exploiting Carbon Nanotube FETs and Resistive RAM: Hyperdimensional Computing Case Study
Tony F. Wu1, Haitong Li1, Ping-Chen Huang2, Abbas Rahimi2,
Jan M. Rabaey2, H.-S. Philip Wong1, Max M. Shulaker3, Subhasish Mitra1 Stanford University, Stanford, CA University of California, Berkeley, Berkeley, CA 3 Massachusetts Institute of Technology, Cambridge, MA 1 2 We demo
ISSCC 2018 Session 31 AI / ML
A 65nm 1Mb Nonvolatile Computing-in-Memory ReRAM Macro with Sub-16ns Multiply-andAccumulate for Binary DNN AI Edge Processors
Wei-Hao Chen, Kai-Xiang Li, Wei-Yu Lin, Kuo-Hsiang Hsu, Pin-Yi Li,
Cheng-Han Yang, Cheng-Xin Xue, En-Yu Yang, Yen-Kai Chen, Yun-Sheng Chang, Tzu-Hsiang Hsu, Ya-Chin King, Chorng-Jung Lin, Ren-Shuo Liu, Chih-Cheng Hsieh, Kea-Tiong Tang, Meng-Fan Chang National Tsing Hua University, Hsinc
ISSCC 2018 Session 31 AI / ML
A 65nm 4Kb Algorithm-Dependent Computing-inMemory SRAM Unit-Macro with 2.3ns and 55.8TOPS/W Fully Parallel Product-Sum Operation for Binary DNN Edge Processors
Win-San Khwa1,2, Jia-Jing Chen1, Jia-Fang Li1, Xin Si3, En-Yu Yang1,
Technology of China, Sichuan, China 4 Arizona State University, Tempe, AZ 1 3 For deep-neural-network (DNN) processors [1-4], the product-sum (PS) operation predominates the computational workload for both convolution (C
ISSCC 2018 Session 4 mm-Wave
A 60GHz 144-Element Phased-Array Transceiver with 51dBm Maximum EIRP and ±60° Beam Steering for Backhaul Application
Tirdad Sowlati, Saikat Sarkar, Bevin Perumana, Wei Liat Chan,
Bagher Afshar, Michael Boers, Donghyup Shin, Timothy Mercer, Wei-Hong Chen, Anna Papio Toda, Alfred Grau Besoli, Seunghwan Yoon, Sissy Kyriazidou, Phil Yang, Vipin Aggarwal, Nooshin Vakilian, Dmitriy Rozenblit, Masoud Ka
ISSCC 2018 Session 4 mm-Wave
A 23-to-30GHz Hybrid Beamforming MIMO Receiver Array with Closed-Loop Multistage Front-End Beamformers for Full-FoV Dynamic and Autonomous Unknown Signal Tracking and Blocker Rejection
Min-Yu Huang, Taiyun Chi, Fei Wang, Tso-Wei Li, Hua Wang
Millimeter-wave massive MIMOs leverage large array size to enhance the link budget and spatial selectivity, but their resulting narrow beamwidth substantially complicates the transmitter-receiver (TX-RX) alignment. Unlik
ISSCC 2018 Session 4 mm-Wave
A 28GHz Bulk-CMOS Dual-Polarization Phased-Array Transceiver with 24 Channels for 5G User and Basestation Equipment
J. D. Dunworth1, A. Homayoun1, B-H. Ku1, Y-C. Ou1, K. Chakraborty1,
G. Liu1, T. Segoria1, J. Lerdworatawee1, J. W. Park1, H-C. Park2, H. Hedayati3, D. Lu1, P. Monat1, K. Douglas1, V. Aparin1 Qualcomm, San Diego, CA now with Samsung Electronics, Suwon, Korea 3 now with Atlazo, San Diego,
ISSCC 2018 Session 4 mm-Wave
A Reconfigurable 28/37GHz Hybrid-Beamforming MIMO Receiver with Inter-Band Carrier Aggregation and RF-Domain LMS Weight Adaptation
Susnata Mondal, Rahul Singh, Jeyanandh Paramesh
This paper presents a hybrid beamforming mm-wave MIMO receiver with two key innovations. First, it can be configured into three modes: two single-band multistream modes at 28 or 37 GHz that can support single- or multi-u
ISSCC 2018 Session 4 mm-Wave
A Fully Integrated Scalable W-Band Phased-Array
Module with Integrated Antennas, Self-Alignment and, Self-Test
SiGe BiCMOS and CMOS processes continue to push the frontier on millimeter-wave (mm-wave) and highly integrated phased-array systems for a variety of communication applications [1,3]. Furthermore, next-generation mobile
ISSCC 2018 Session 4 mm-Wave
A 64GHz Full-Duplex Transceiver Front-End with an On-Chip Multifeed Self-Interference-Canceling Antenna and an All-Passive Canceler Supporting 4Gb/s Modulation in One Antenna Footprint
Taiyun Chi, Jong Seok Park, Sensen Li, Hua Wang
Millimeter-wave full-duplex (FD) transceivers (TRXs) have the potential to unlock the full throughput of future 5G links. A major challenge in mm-wave FD TRXs is to suppress the wideband modulated self-interference (SI)
ISSCC 2018 Session 5 Image Sensors
A Back-Illuminated Global-Shutter CMOS Image Sensor with Pixel-Parallel 14b Subthreshold ADC
Masaki Sakakibara1, Koji Ogawa1, Shin Sakai1, Yasuhisa Tochigi1,
Katsumi Honda1, Hidekazu Kikuchi1, Takuya Wada1, Yasunobu Kamikubo1, Tsukasa Miura1, Masahiko Nakamizo1, Naoki Jyo2, Ryo Hayashibara2, Yohei Furukawa3, Shinya Miyata3, Satoshi Yamamoto1, Yoshiyuki Ota1, Hirotsugu Takahas
ISSCC 2018 Session 5 Image Sensors
A 32×32-Pixel Time-Resolved Single-Photon Image Sensor with 44.64μm Pitch and 19.48% Fill-Factor with On-Chip Row/Frame Skipping Features Reaching 800kHz Observation Rate for Quantum Physics Applications
Leonardo Gasparini1, Majid Zarghami1, Hesong Xu1, Luca Parmesan1,
Manuel Moreno Garcia1, Manuel Unternährer2, Bänz Bessire2, André Stefanov2, David Stoppa1,3, Matteo Perenzoni1 Fondazione Bruno Kessler (FBK), Trento, Italy University of Bern, Bern, Switzerland; 3now with ams AG, Rüschl
ISSCC 2018 Session 5 Image Sensors
An 8K4K-Resolution 60fps 450ke--Saturation-Signal Organic-Photoconductive-Film Global-Shutter CMOS Image Sensor with In-Pixel Noise Canceller
Kazuko Nishimura1, Sanshiro Shishido1, Yasuo Miyake1,
Masaaki Yanagida1, Yoshiaki Satou1, Makoto Shouho1, Hidenari Kanehara1, Ryota Sakaida1, Yoshihiro Sato1, Junji Hirase1, Yuko Tomekawa1, Yutaka Abe2, Hiroshi Fujinaka2, Yoshiyuki Matsunaga3, Masashi Murakami1, Mitsuru Har
ISSCC 2018 Session 5 Image Sensors
A 1/2.8-inch 24Mpixel CMOS Image Sensor with 0.9μm Unit Pixels Separated by Full-Depth Deep-Trench Isolation
Yitae Kim, Wonchul Choi, Donghyuk Park, Heegeun Jeoung,
Bumsuk Kim, Youngsun Oh, Sunghoon Oh, Byungjun Park, Euiyeol Kim, YunKi Lee, Taesub Jung, Yongwoon Kim, Sukki Yoon, Seokyong Hong, Jesuk Lee, Sangil Jung, Chang-Rok Moon, Yongin Park, Duckhyung Lee, Duckhyun Chang Samsun
ISSCC 2018 Session 5 Image Sensors
A 1/4-inch 3.9Mpixel Low-Power Event-Driven Back-Illuminated Stacked CMOS Image Sensor
Oichi Kumagai1, Atsumi Niwa1, Katsuhiko Hanzawa2, Hidetaka Kato1,
Shinichiro Futami1, Toshio Ohyama1, Tsutomu Imoto1, Masahiko Nakamizo1, Hirotaka Murakami2, Tatsuki Nishino1, Anas Bostamam1, Takahiro Iinuma1, Naoki Kuzuya1, Kensuke Hatsukawa3, Frederick Brady2, William Bidermann2, Tos
ISSCC 2018 Session 5 Image Sensors
A 1.1μm-Pitch 13.5Mpixel 3D-Stacked CMOS Image Sensor Featuring 230fps Full-High-Definition and 514fps High-Definition Videos by Reading 2 or 3 Rows Simultaneously Using a Column-Switching Matrix
Po-Sheng Chou, Chin-Hao Chang, Manoj M. Mhala,
Charles Chih-Min Liu, Calvin Yi-Ping Chao, Chiao-Yi Huang, Honyih Tu, Thomas Wu, Shang-Fu Yeh, Seiji Takahashi, Yimin Huang TSMC, Hsinchu, Taiwan Slow-motion video is a desirable feature for state-of-art smartphones. The
ISSCC 2018 Session 5 Image Sensors
A 2.1μm 33Mpixel CMOS Imager with Multi-Functional 3-Stage Pipeline ADC for 480fps High-Speed Mode and 120fps Low-Noise Mode
Toshio Yasue1, Kohei Tomioka1, Ryohei Funatsu1, Tomohiro Nakamura1,
Takahiro Yamasaki1, Hiroshi Shimamoto1, Tomohiko Kosugi2, Sung-Wook Jun2, Takashi Watanabe2,3, Masanori Nagase2, Toshiaki Kitajima2, Satoshi Aoyama2, Shoji Kawahito2,3 NHK Science & Technology Research Laboratories, Toky
ISSCC 2018 Session 5 Image Sensors
A 20ch TDC/ADC Hybrid SoC for 240×96-Pixel 10%-Reflection <0.125%-Precision 200m-Range Imaging LiDAR with Smart Accumulation Technique
Kentaro Yoshioka1, Hiroshi Kubota1, Tomonori Fukushima1,
Satoshi Kondo1, Tuan Thanh Ta1, Hidenori Okuni1, Kaori Watanabe1, Yoshinari Ojima1, Katsuyuki Kimura1, Sohichiroh Hosoda1, Yutaka Oota1, Tomohiro Koizumi1, Naoyuki Kawabe1, Yasuhiro Ishii1, Yoichiro Iwagami1, Seitaro Yag
ISSCC 2018 Session 5 Image Sensors
1Mpixel 65nm BSI 320MHz Demodulated TOF Image Sensor with 3.5μm Global Shutter Pixels and Analog Binning
Cyrus S. Bamji, Swati Mehta, Barry Thompson, Tamer Elkhatib,
Stefan Wurster, Onur Akkaya, Andrew Payne, John Godbaz, Mike Fenton, Vijay Rajasekaran, Larry Prather, Satya Nagaraja, Vishali Mogallapu, Dane Snow, Rich McCauley, Mustansir Mukadam, Iskender Agi, Shaun McCarthy, Zhanpin
ISSCC 2018 Session 5 Image Sensors
A 256×256 45/65nm 3D-Stacked SPAD-Based Direct TOF Image Sensor for LiDAR Applications with Optical Polar Modulation for up to 18.6dB Interference Suppression
Augusto Ronchini Ximenes1, Preethi Padmanabhan2, Myung-Jae Lee2,
Yuichiro Yamashita3, D. N. Yaung3, Edoardo Charbon1,2 Delft University of Technology, Delft, The Netherlands EPFL, Neuchatel, Switzerland; 3TSMC, Hsinchu, Taiwan 1 2 Light detection and ranging (LiDAR) systems based on d
ISSCC 2018 Session 6 Wireline I/O
A 112Gb/s PAM-4 Transmitter with 3-Tap FFE in 10nm CMOS
Jihwan Kim, Ajay Balankutty, Rajeev Dokania, Amr Elshazly,
infrastructure has fueled the industry to develop ultra-high-speed/density wireline links compliant with electrical interface standards such as CEI-56G and 802.3bs400GbE. Recent publications have demonstrated CMOS transm
ISSCC 2018 Session 6 Wireline I/O
A 112Gb/s 2.6pJ/b 8-Tap FFE PAM-4 SST TX in 14nm CMOS
Christian Menolfi1, Matthias Braendli1, Pier Andrea Francese1,
Thomas Morf1, Alessandro Cevrero1, Marcel Kossel1, Lukas Kull1, Danny Luu1,2, Ilter Ozkaya1,3, Thomas Toifl1 IBM Zurich Research Laboratory, Rueschlikon, Switzerland 2 ETH Zurich, Zurich, Switzerland 3 EPFL, Lausanne, Sw
ISSCC 2018 Session 6 Wireline I/O
A 4-Lane 1.25-to-28.05Gb/s Multi-Standard 6pJ/b 40dB Transceiver in 14nm FinFET with Independent TX/RX Rate Support
Mohammad Sadegh Jalali, Mohammad Hossein Taghavi, Angus Mclaren,
Jennifer Pham, Kamran Farzan, Dominic Diclemente, Marcus van Ierssel, William Song, Saman Asgaran, Chris Holdenried, Saman Sadr Rambus, Toronto, Canada The scaling of CMOS technology together with continued innovations i
ISSCC 2018 Session 6 Wireline I/O
A Fully Adaptive 19-to-56Gb/s PAM-4 Wireline Transceiver with a Configurable ADC in 16nm FinFET
Parag Upadhyaya1, Chi Fung Poon1, Siok Wei Lim2, Junho Cho1,
Arianne Roldan2, Wenfeng Zhang1, Jin Namkoong1, Toan Pham1, Bruce Xu1, Winson Lin1, Hongtao Zhang1, Nakul Narang2, Kee Hian Tan2, Geoff Zhang1, Yohan Frans1, Ken Chang1 Xilinx, San Jose, CA Xilinx, Singapore, Singapore 1
ISSCC 2018 Session 6 Wireline I/O
A 64Gb/s PAM-4 Transceiver Utilizing an Adaptive Threshold ADC in 16nm FinFET
Luke Wang1, Yingying Fu2, MarcAndre LaCroix3, Euhan Chong3, Anthony Chan Carusone1
for PAM-4 links above 50Gb/s [1,2], although fewer bits are sufficient and offer lower power for short reach (SR) channels. To further reduce the power consumption of ADC-based wireline transceivers, non-uniform quantiza
ISSCC 2018 Session 6 Wireline I/O
A 4.9pJ/b 16-to-64Gb/s PAM-4 VSR Transceiver in 28nm FDSOI CMOS
Emanuele Depaoli1, Enrico Monaco1, Giovanni Steffan1, Marco Mazzini1,
Hongyang Zhang2, Walter Audoglio1, Oscar Belotti1, Augusto Andrea Rossi1, Guido Albasini1, Massimo Pozzoni1, Simone Erba1, Andrea Mazzanti2 STMicroelectronics, Pavia, Italy University of Pavia, Pavia, Italy 1 2 PAM-4 mod
ISSCC 2018 Session 6 Wireline I/O
A 32Gb/s 133mW PAM-4 Transceiver with DFE Based on Adaptive Clock Phase and Threshold Voltage in 65nm CMOS
Liangxiao Tang, Weixin Gai, Linqi Shi, Xiao Xiang, Kai Sheng, Ai He
With the proliferation of the Internet of Things and mobile computing, network speed is accelerating to support data-rich services. This drives the explosion of bandwidth requirement on backplane interconnects while chan
ISSCC 2018 Session 7 Clocking & PLLs
A 0.0056mm2 All-Digital MDLL Using Edge
Re-Extraction, Dual-Ring VCOs and a 0.3mW, Block-Sharing Frequency Tracking Loop Achieving
292fsrms Jitter and -249dB FOM Shiheng Yang1, Jun Yin1, Pui-In Mak1, Rui P. Martins1,2 University of Macau, Macau, China Instituto Superior Tecnico/University of Lisboa, Lisbon, Portugal 1 2 Multiplying delay-locked loop
ISSCC 2018 Session 7 Clocking & PLLs
A 0.02mm2 Fully Synthesizable Period-Jitter Sensor Using Stochastic TDC Without Reference Clock and Calibration in 10nm CMOS Technology
Kangyeop Choo, Hyunik Kim, Wooseok Kim, Jihyun Kim, Taeik Kim, Hyungjong Ko
becomes challenging. To effectively manage the tight jitter performance required by an SoC, the clock quality should be directly evaluated at every point where the clock is used in the SoC. In previous work [1-3], on-chi
ISSCC 2018 Session 7 Clocking & PLLs
A 0.3-to-1.2V Frequency-Scalable Fractional-N ADPLL with a Speculative Dual-Referenced Interpolating TDC
Minseob Lee1, Shinwoong Kim2, Hwasuk Cho1, Jahyun Koo1,
Power management with dynamic frequency control has been a key feature in battery-operated systems. It effectively reduces energy consumption by the microcontroller in mobile systems towards meeting ultra-low-power const
ISSCC 2018 Session 7 AI / ML
A 55nm Time-Domain Mixed-Signal Neuromorphic Accelerator with Stochastic Synapses and Embedded Reinforcement Learning for Autonomous Micro-Robots
Anvesha Amravati, Saad Bin Nasir, Sivaram Thangadurai, Insik Yoon, Arijit Raychowdhury
networks (DNNs) and convolutional neural networks (CNNs) with most hardware demonstrations geared towards inference in vision-based platforms [1-5], we recognize that true autonomy in intelligent agents will only emerge
ISSCC 2018 Session 7 Clocking & PLLs
An Enhanced-Security Buck DC-DC Converter with True-Random-Number-Based Pseudo Hysteresis Controller for Internet-of-Everything (IoE) Devices
Wen-Hau Yang1, Li-Cheng Chu1, Shang-Hsien Yang1, Yan-Jiun Lai1,
Internet-of-Everything (IoE) devices are concerned, strong security and low electromagnetic interference (EMI) are design requirements for power management to guarantee personal data protection. [1] is robust under power
ISSCC 2018 Session 7 Clocking & PLLs
A Secure Camouflaged Logic Family Using PostManufacturing Programming with a 3.6GHz Adder Prototype in 65nm CMOS at 1V Nominal VDD Fig. 7.6.3 shows the Shmoo plots for the pre-programmed adder design under no stress (baseline), 60 seconds reverse function stress from baseline, and 60 seconds boost stress from baseline. The 60 second reverse function stress fully alters the logic function of the pre-programmed gates. The stress voltage is 3V, resulting in a current density and voltage drop per leg of 18.4mA/μm2 and 2.67V.
Nail Etkin Can Akkaya, Burak Erbagci, Ken Mai
With the continued globalization of the IC manufacturing supply chain, securing that supply chain is becoming increasingly difficult and this opens the door to a myriad of security threats such as unauthorized production
ISSCC 2018 Session 7 Clocking & PLLs
A PUF Scheme Using Competing Oxide Rupture with Bit Error Rate Approaching Zero
Meng-Yi Wu, Tsao-Hsin Yang, Lun-Chun Chen, Chi-Chang Lin,
Hao-Chun Hu, Fang-Ying Su, Chih-Min Wang, James Po-Hao Huang, Hsin-Ming Chen, Chris Chun-Hung Lu, Evans Ching-Sung Yang, Rick Shih-Jye Shen eMemory, Hsinchu, Taiwan Security is critical to today’s interconnected world, a
ISSCC 2018 Session 7 Clocking & PLLs
A 445F2 Leakage-Based Physically Unclonable Function with Lossless Stabilization Through Remapping for IoT Security
Jongmin Lee, Donghyeon Lee, Yongmin Lee, Yoonmyung Lee
With the advent of the IoT era, billions of devices are connected to networks, and assuring sufficient security at low cost is a critical concern. Physically Unclonable Functions (PUFs) have drawn increasing attention as
ISSCC 2018 Session 8 Wireless
A 960pW Co-Integrated-Antenna Wireless Energy Harvester for WiFi Backchannel Wireless Powering
Kamala Raghavan Sadagopan1, Jian Kang1, Yogesh Ramadass2, Arun Natarajan1
power sensors can enable perpetually powered sensors for several monitoring and asset-tracking IoT applications. Small form factor is often desirable to ensure unobtrusive sensors. However, typical 2.4GHz WiFi output pow
ISSCC 2018 Session 8 Wireless
A 13.56MHz Time-Interleaved Resonant-VoltageMode Wireless-Power Receiver with Isolated Resonator and Quasi-Resonant Boost Converter for Implantable Systems
Se-Un Shin1, Minseong Choi1, Seok-Tae Koh1, Yujin Yang1,
Seungchul Jung2, Young-Hoon Sohn1, Se-Hong Park1, Yongmin Ju1, Youngsin Jo1, Yeunhee Huh1, Sungwon Choi1, Sang Joon Kim2, Gyu-Hyeong Cho1 KAIST, Daejeon, Korea Samsung Advanced Institute of Technology, Suwon, Korea 1 2 W
ISSCC 2018 Session 8 Wireless
A 70W and 90% GaN-Based Class-E Wireless-PowerTransfer System with Automatic-Matching-PointSearch Control for Zero-Voltage Switching and Zero-Voltage-Derivative Switching
Che-Hao Yeh1, Yen-Ting Lin1, Chun-Chieh Kuo1, Chao-Jen Huang1,
High-power (>50W) and high-efficiency (>90%) wireless-power-transfer (WPT) systems are becoming in demand for portable electronic applications. In Fig. 8.2.1, power efficiency and/or output power specifications in prior-
ISSCC 2018 Session 8 Wireless
A Reconfigurable Cross-Connected Wireless-Power Transceiver for Bidirectional Device-to-Device Charging with 78.1% Total Efficiency
Fangyu Mao1, Yan Lu1, Seng-Pan U1,2, Rui P. Martins1,3
Synopsys Macau, Macau, China 3 Instituto Superior Técnico/Universidade de Lisboa, Lisbon, Portugal 1 2 Wireless power transfer (WPT) via inductive coupling is a convenient way to charge power-starved portable/wearable de
ISSCC 2018 Session 8 Wireless
A 13.56MHz Wireless Power and Data Transfer Receiver Achieving 75.4% Effective-PowerConversion Efficiency with 0.1% ASK Modulation Depth and 9.2mW Output Power
Yu Wang1, Dawei Ye1, Liangjian Lyu1, Yingfei Xiang1, Hao Min1,
C.-J. Richard Shi1,2 Fudan University, Shanghai, China University of Washington, Seattle, WA 1 2 Implantable and wearable devices require both wireless power transfer (WPT) and wireless data transmission (WDT) in biomedi
ISSCC 2018 Session 8 Wireless
MISIMO: A Multi-Input Single-Inductor Multi-Output Energy Harvester Employing Event-Driven MPPT
Control to Achieve 89% Peak Efficiency and a 60,000×, Dynamic Range in 28nm FDSOI
Sally Safwat Amin, Patrick P. Mercier University of California, San Diego, La Jolla, CA Harvesting energy from ambient sources is an attractive way to enable net-zeropower operation in small wearables, environmental moni
ISSCC 2018 Session 8 Wireless
A 4.5-to-16μW Integrated Triboelectric EnergyHarvesting System Based on High-Voltage Dual-Input Buck Converter with MPPT and 70V Maximum Input Voltage
Inho Park, Junyoung Maeng, Dongju Lim, Minseob Shim,
introduced in 2012, and various types of energy harvesters and active sensors based on the TENG have since been developed. Although research in the materialengineering field is actively conducted, there is not much resea
ISSCC 2018 Session 8 Wireless
A Piezoelectric Energy-Harvesting Interface Circuit with Fully Autonomous Conjugate Impedance
Matching, 156% Extended Bandwidth, and 0.38μW, Power Consumption
of t1/t2 to approximate the optimal t1/t2 as closely as possible. The system measures the excitation frequency to decide which combination to use. This design greatly reduces the number of t1/t2 parameters to only 6 (Fig
ISSCC 2018 Session 8 Wireless
A 30nA Quiescent 80nW-to-14mW Power-Range Shock-Optimized SECE-Based Piezoelectric Harvesting Interface with 420% Harvested-Energy Improvement
Anthony Quelen1, Adrien Morel1, Pierre Gasnier1, Romain Grézaud1,
mechanical energy (vibration, shocks) into electrical energy, in order to supply energyautonomous sensor nodes in industrial, biomedical or domotic applications. Non-linear extraction strategies such as Synchronous Elect
ISSCC 2018 Session 8 Wireless
A Fully Integrated Split-Electrode SynchronizedSwitch-Harvesting-on-Capacitors (SE-SSHC) Rectifier for Piezoelectric Energy Harvesting with Between 358% and 821% Power-Extraction Enhancement
Sijun Du, Ashwin A. Seshia
Along with the development of the Internet of Everything (IoE), miniaturized piezoelectric vibration-energy harvesters have drawn significant recent interest as a means of harvesting ambient kinetic energy to power wirel
ISSCC 2018 Session 9 Wireless
A Multimode 76-to-81GHz Automotive Radar Transceiver with Autonomous Monitoring
Brian P. Ginsburg1, Karthik Subburaj2, Sreekiran Samala1,
Karthik Ramasubramanian2, Jasbir Singh2, Sumeer Bhatara2, Sriram Murali2, Dan Breen1, Meysam Moallem1, Krishnanshu Dandu1, Saket Jalan2,3, Neeraj Nayak1, Rittu Sachdev2, Indu Prathapan2, Karan Bhatia1, Tim Davis1, Eunyou
ISSCC 2018 Session 9 Wireless
A 253mW/Channel 4TX/4RX Pulsed Chirping PhasedArray Radar TRX in 65nm CMOS for X-Band SyntheticAperture Radar Imaging
Liheng Lou1, Kai Tang1, Bo Chen1, Ting Guo1, Yisheng Wang2,
2 Airborne or spaceborne synthetic aperture radar (SAR) targeted for microunmanned aerial vehicles (UAV) or micro-satellites is capable of observing large area under all weather conditions with strong penetration, and fi
ISSCC 2018 Session 9 Wireless
A Highly Reconfigurable 65nm CMOS RF-to-Bits Transceiver for Full-Band Multicarrier TDD/FDD 2G/3G/4G/5G Macro Basestations
David J. McLaurin1, Kevin G. Gard1, Richard P. Schubert2,
Manish J. Manglani3, Haiyang Zhu4, David Alldred5, Zhao Li5, Steven R. Bal1, Jianxun Fan1, Oliver E. Gysel1, Christopher M. Mayer2, Tony Montalvo1 Analog Devices, Raleigh, NC Analog Devices, Norwood, MA 3 Analog Devices,
ISSCC 2018 Session 9 Wireless
A 40Gb/s 6pJ/b RX Baseband in 28nm CMOS for 60GHz Polarization MIMO
Shinwon Kang1, Chintan Thakkar1, Nathan Narevsky2, Kaushik Dasgupta1,
Since tap-1 feedback is latency sensitive (delay<UI/2 for current integration), the tap-1 coefficients are flash-encoded to allow removing the MUX from the critical path and incorporating the MUX with the feedback regist