ISSCC 2018

2018

205 篇论文 · Wireless (27) · RF & Wireless (23) · Wireline I/O (18) · AI / ML (17)

ISSCC 2018 Session 25 Wireline I/O
A 4-to-16GHz Inverter-Based Injection-Locked Quadrature Clock Generator with Phase Interpolators for Multi-Standard I/Os in 7nm FinFET
attenuating the detected phase error signals. The outputs, Vdet_p and Vdet_n, are, averaged out by the V-to-I converter
suppress the supply noise, a voltage regulator is used to regulate the ILRO supply, Vreg_ILRO, which tracks Vctrl. Stanley Chen, Lei Zhou, Ian Zhuang, Jay Im, Didem Melek, Jinyung Namkoong, Mayank Raj, Jaewook Shin, Yoha
ISSCC 2018 Session 25 Wireline I/O
A 5GHz 370fsrms 6.5mW Clock Multiplier Using a Crystal-Oscillator Frequency Quadrupler in 65nm CMOS
Karim M. Megawer, Ahmed Elkholy, Daniel Coombs, Mostafa G. Ahmed,
(RO-based) clock multipliers is typically limited by oscillator noise. The most power-efficient method for improving the phase noise of such clock multipliers is by increasing the oscillator noise suppression bandwidth (
Ahmed Elmallah, Pavan Kumar Hanumolu University of Illinois, Urbana, I
ISSCC 2018 Session 25 Wireline I/O
A Fractional-N Digital PLL with Background-DitherNoise-Cancellation Loop Achieving <-62.5dBc WorstCase Near-Carrier Fractional Spurs in 65nm CMOS
Cheng-Ru Ho, Mike Shuo-Wei Chen
Fractional-N digital phase-locked loops (DPLLs) are highly reconfigurable, scalable, and useful for synthesizing clocks with fine frequency resolution for modem RF, mixed-signal and digital VLSI systems. One critical des
University of Southern California, Los Angeles, CA
ISSCC 2018 Session 25 Wireline I/O
A -242dB FOM and -75dBc-Reference-Spur Ring-DCO-Based All-Digital PLL Using a Fast Phase-Error Correction Technique and a Low-Power Optimal-Threshold TDC
Taeho Seong, Yongsun Lee, Seyeon Yoo, Jaehyouk Choi
To improve efficiency in the use of silicon, there have been many efforts to develop ring-oscillator-based clock generators with low jitter. A PLL using a fast phaseerror correction (FPEC) technique [1] is one promising
Ulsan National Institute of Science and Technology, Ulsan, Korea
ISSCC 2018 Session 26 RF & Wireless
A 0.55-to-0.9GHz 2.7dB NF Full-Duplex HybridCoupler Circulator with 56MHz 40dB TX SI Suppression
Sanket Jain, Abhishek Agrawal, Manoj Johnson, Arun Natarajan
Simultaneous transmit-and-receive (STAR) radios enable higher spectrum efficiency and dynamic spectrum access. The integration of a shared antenna interface is attractive for small system formfactor and MIMO channel esti
Oregon State University, Corvallis, OR
ISSCC 2018 Session 26 RF & Wireless
A 128-Pixel 0.56THz Sensing Array for Real-Time Near-Field Imaging in 0.13µm SiGe BiCMOS
Philipp Hillger1, Ritesh Jain1, Janusz Grzyb1, Laven Mavarani1,
Bergonié, Bordeaux, France 4 CNRS, Talence, France 5 University of Bordeaux, Talence, France 1 2 Real-time terahertz video cameras are regarded as key enabler systems for numerous applications. Unfortunately, their spati
Bernd Heinemann2, Gaetan Mac Grogan3, Patrick Mounaix4, Thomas Zimmer5
ISSCC 2018 Session 26 RF & Wireless
A 62-to-68GHz Linear 6Gb/s 64QAM CMOS Doherty Radiator with 27.5%/20.1% PAE at Peak/6dB-Back-off Output Power Leveraging High-Efficiency Multi-Feed Antenna-Based Active Load Modulation
Huy Thong Nguyen, Taiyun Chi, Sensen Li, Hua Wang
Extreme throughput requirements on future mm-wave systems, e.g., 5G links, necessitates the use of spectrum-efficient modulations that often come with high peak-to-average power ratios (PAPRs). Therefore, there is an inc
Georgia Institute of Technology, Atlanta, GA
ISSCC 2018 Session 26 RF & Wireless
A 69-to-79GHz CMOS Multiport PA/Radiator with +35.7dBm CW EIRP and Integrated PLL
Behrooz Abiri, Ali Hajimiri
Low-cost mm-wave silicon integrated signal generation and processing enable many applications, such as silicon-based automotive radars for self-driving cars and wireless communications. Some challenges encountered in com
California Institute of Technology, Pasadena, CA
ISSCC 2018 Session 26 AI / ML
A 28GHz 41%-PAE Linear CMOS Power Amplifier Using a Transformer-Based AM-PM DistortionCorrection Technique for 5G Phased Arrays
Sheikh Nijam Ali1, Pawan Agarwal2, Joe Baylon1, Srinivasan Gopal1,
high data-rates, the millimeter-wave (mmW) 5G communication standard will extensively use high-order complex-modulation schemes (e.g., QAM) with high peak-to-average power ratios (PAPRs) and large RF bandwidths. High-eff
Luke Renaud1, Deukhyoun Heo1 Washington State University, Pullman, WA,
ISSCC 2018 Session 26 AI / ML
A Compact Dual-Band Digital Doherty Power Amplifier Using Parallel-Combining Transformer for Cellular NB-IoT Applications
Yun Yin, Liang Xiong, Yiting Zhu, Bowen Chen, Hao Min, Hongtao Xu
Narrowband Internet-of-Things (NB-IoT) is a newly developed 3GPP protocol optimized for low-power wide-area IoT applications and is evolving toward the future fifth-generation (5G) mobile communication. It specifies at l
Fudan University, Shanghai, China
ISSCC 2018 Session 26 RF & Wireless
A Continuous-Mode Harmonically Tuned 19-to-29.5GHz Ultra-Linear PA Supporting 18Gb/s at 18.4% Modulation PAE and 43.5% Peak PAE
Tso-Wei Li, Ming-Yu Huang, Hua Wang
The 5th generation (5G) mm-wave systems are expected to support wideband spectrum-efficient modulations (e.g., 64-QAM or 256-QAM) to achieve Gb/s-linkthroughput revolution. These complex modulation schemes, however, ofte
Georgia Institute of Technology, Atlanta, GA
ISSCC 2018 Session 26 RF & Wireless
A Coupled-RTWO-Based Subharmonic Receiver FrontEnd for 5G E-Band Backhaul Links in 28nm Bulk CMOS
Marco Vigilante, Patrick Reynaert
A fully integrated receiver for high-capacity 5G E-Band Backhaul links (71 to 76GHz and 81 to 86GHz) needs a local-oscillator (LO) distribution network with >19% tuning range (TR) and accurate quadrature phases. Further,
KU Leuven, Heverlee, Belgium
ISSCC 2018 Session 26 RF & Wireless
A 12mW 70-to-100GHz Mixer-First Receiver Front-End for mm-Wave Massive-MIMO Arrays in 28nm CMOS
Lorenzo Iotti, Greg LaCaille, Ali M. Niknejad
Multi-user multiple-input multiple-output (MIMO) systems are promising enablers for high-capacity wireless access in next-generation mobile networks. Leveraging antenna arrays at the access point, narrow beams can be ste
University of California, Berkeley, CA
ISSCC 2018 Session 26 RF & Wireless
A 13th-Order CMOS Reconfigurable RF BPF with Adjustable Transmission Zeros for SAW-Less SDR Receivers
Pingyue Song, Hossein Hashemi
Current cellular receivers often employ acoustic filters (SAW or BAW) for each communication band due to their high selectivity, low insertion loss, and small formfactor. The need to support multiple communication bands,
University of Southern California, Los Angeles, CA
ISSCC 2018 Session 27 Power Management
A 0.22-to-2.4V-Input Fine-Grained Fully Integrated Rational Buck-Boost SC DC-DC Converter Using Algorithmic Voltage-Feed-In (AVFI) Topology Achieving 84.1% Peak Efficiency at 13.2mW/mm2
Yang Jiang1, Man-Kay Law1, Pui-In Mak1, Rui P. Martins1,2
Instituto Superior Tecnico/University of Lisboa, Lisbon, Portugal 1 2 Most existing switched-capacitor (SC) DC-DC converters only offer a few voltage conversion ratios (VCRs), leading to significant efficiency fluctuatio
University of Macau, Macau, China,
ISSCC 2018 Session 27 Power Management
A 10MHz Time-Domain-Controlled Current-Mode Buck Converter with 8.5% to 93% Switching Duty Cycle
Jin-Gyu Kang, Min-Gyu Jeong, Jeongpyo Park, Changsik Yoo
Current-mode DC-DC converters offer various advantages over voltage-mode DCDC converters such as much simpler frequency compensation, automatic over-current protection, and faster transient response [1,2]. For current-mo
Hanyang University, Seoul, Korea
ISSCC 2018 Session 27 Power Management
An 86% Efficiency SIMO DC-DC Converter with One
Boost, One Buck, and a Floating Output Voltage for, Car-Radio
Arunkumar Salimath1, Edoardo Bonizzoni1, Edoardo Botti2, Giovanni Gonano2, Paolo Cacciagrano2, Davide Luigi Brambilla2, Tommaso Barbieri2, Franco Maloberti1 University of Pavia, Pavia, Italy; 2STMicroelectronics, Cornare
ISSCC 2018 Session 27 Power Management
A 97% High-Efficiency 6µs Fast-Recovery-Time BuckBased Step-Up/Down Converter with Embedded 1/2 and 3/2 Charge-Pumps for Li-Ion Battery Management
Min-Woo Ko1, Ki-Duk Kim1, Young-Jin Woo2, Se-Un Shin1, Hyun-Ki Han1,
Yeunhee Huh1, Gyeong-Gu Kang1, Jeong-Hyun Cho1, Sang-Jin Lim1, Se-Hong Park1, Hyung-Min Lee3, Gyu-Hyeong Cho1 KAIST, Daejeon, Korea Siliconworks, Daejeon, Korea 3 Korea University, Seoul, Korea 1 2 Lithium-ion batteries
ISSCC 2018 Session 27 Power Management
A 95.2% Efficiency Dual-Path DC-DC Step-Up Converter with Continuous Output Current Delivery and Low Voltage Ripple
Se-Un Shin1, Yeunhee Huh1, Yongmin Ju1, Sungwon Choi1,
Changsik Shin1, Young-Jin Woo1, Minseong Choi1, Se-Hong Park1, Young-Hoon Sohn1, Min-Woo Ko1, Youngsin Jo1, Hyunki Han1, Hyung-Min Lee2, Sung-Wan Hong3, Wanyuan Qu4, Gyu-Hyeong Cho1 KAIST, Daejeon, Korea Korea University
ISSCC 2018 Session 27 Power Management
An 87.1% Efficiency RF-PA Envelope-Tracking Modulator for 80MHz LTE-Advanced Transmitter and 31dBm PA Output Power for HPUE in 0.153μm CMOS
Chen-Yen Ho, Shih-Mei Lin, Che-Hao Meng, Hao-Ping Hong,
Sheng-Hong Yan, Ting-Hsun Kuo, Chia-Sheng Peng, Chieh-Hsun Hsiao, Hsin-Hung Chen, Da-Wei Sung, Chien-Wei Kuan MediaTek, Hsinchu, Taiwan Modulation schemes employed in long-term-evolution advanced (LTE-A) services for hig
ISSCC 2018 Session 27 Power Management
A 2TX Supply Modulator for Envelope-Tracking Power Amplifier Supporting Intra- and Inter-Band Uplink Carrier Aggregation and Power Class-2 High-Power User Equipment
Takahiro Nomiyama1, Yongsik Youn2, Younghwan Choo1, Dongsu Kim1,
Jaeyeol Han1, Junhee Jung1, Jongbeom Baek1, Sungjun Lee1, Euiyoung Park1, Jeonghyun Choi1, Ji-Seon Paek1, Jongwoo Lee1, Thomas Byunghak Cho1, Inyup Kang1 Samsung Electronics, Hwaseong, Korea Samsung Semiconductor, San Jo
ISSCC 2018 Session 27 Power Management
94% Power-Recycle and Near-Zero Driving-DeadZone N-Type Low-Dropout Regulator with 20mV Undershoot at Short-Period Load Transient of Flash Memory in Smart Phone respectively. The dynamic bias I1 (IDYN) is about 0.05% of IOUT and the ratio of I2 to I1 is about 1/40. Consequently, at maximum ILOAD=800mA, the proposed LDO performs about 94% power recycling of the controller by recycling dynamic current I1=400μA while I2 and the constant quiescent current of the other controller are 10μA and 15μA, respectively.
Wei-Chung Chen, Tzu-Chi Huang, Chao-Chang Chiu, Chih-Wei Chang, Kuo-Chun Hsu
On the other hand, the proposed ARFF compensation in Figure 27.8.2 provides a dominant pole for frequency compensation and enhances the transient response. For achieving high SR without sacrificing large quiescent curren
ISSCC 2018 Session 27 Power Management
An On-Chip Resonant-Gate-Drive Switched-Capacitor Converter for Near-Threshold Computing Achieving 70.2% Efficiency at 0.92A/mm2 Current Density and 0.4V Output
Moataz Abdelfattah1, Muhammad Swilam1, Brian Dupaix2, Shane Smith1,
promising approach to address the increasing demand for energy efficiency in computing platforms. In NTC, the supply voltage is scaled down to realize quadratic energy savings while degrading the operating frequency only
Ayman Fayed1, Waleed Khalil1 Ohio State University, Columbus, OH Air F
ISSCC 2018 Session 28 Wireless
An 802.11ax 4×4 Spectrum-Efficient WLAN AP Transceiver SoC Supporting 1024QAM with Frequency-Dependent IQ Calibration and Integrated Interference Analyzer
Shusuke Kawai1, Hiromitsu Aoyama2, Rui Ito3, Yutaka Shimizu3, Mitsuyuki Ashida3,
Asuka Maki3, Tomohiko Takeuchi3, Hiroyuki Kobayashi3, Go Urakawa3, Hiroaki Hoshino3, Shigehito Saigusa3, Kazushi Koyama4, Makoto Morita2, Ryuichi Nihei2, Daisuke Goto2, Motoki Nagata3, Kengo Nakata3, Katsuyuki Ikeuchi1,
ISSCC 2018 Session 28 Wireless
An ADPLL-Centric Bluetooth Low-Energy Transceiver with 2.3mW Interference-Tolerant Hybrid-Loop Receiver and 2.9mW Single-Point Polar Transmitter in 65nm CMOS
Hanli Liu, Zheng Sun, Dexian Tang, Hongye Huang, Tohru Kaneko,
achieving ultra-low-power (ULP) operation for Internet-of-Things (IoT) applications. As more and more devices will be connected and access to the Internet, the wireless traffic will be extremely crowded in the 2.4GHz ISM
Wei Deng, Rui Wu, Kenichi Okada, Akira Matsuzawa Tokyo Institute of Te
ISSCC 2018 Session 28 Wireless
A 0.8V 0.8mm2 Bluetooth 5/BLE Digital-Intensive Transceiver with a 2.3mW Phase-Tracking RX Utilizing a Hybrid Loop Filter for Interference Resilience in 40nm CMOS
Ming Ding1, Xiaoyan Wang1, Peng Zhang1, Yuming He1, Stefano Traferro1,
Kenichi Shibata2, Minyoung Song1, Hannu Korpela1, Keisuke Ueda2, Yao-Hong Liu1, Christian Bachmann1, Kathleen Philips1 imec - Holst Centre, Eindhoven, The Netherlands Renesas Electronics, Tokyo, Japan 1 2 This paper pres
ISSCC 2018 Session 28 Wireless
A 0.45V Sub-mW All-Digital PLL in 16nm FinFET for Bluetooth Low-Energy (BLE) Modulation and Instantaneous Channel Hopping Using 32.768kHz Reference
Min-Shueh Yuan1, Chao-Chieh Li1, Chia-Chun Liao1, Yu-Tso Lin1,
short-range wireless transceivers, such as BLE, is to use a crystal oscillator (XO) in the tens-of-MHz range as a frequency reference (FREF) to phase lock an RF oscillator [1-4]. This ensures a sufficiently wide PLL band
Chih-Hsien Chang1, Robert Bogdan Staszewski2 TSMC, Hsinchu, Taiwan; 2U
ISSCC 2018 Session 28 Wireless
A 0.2V Energy-Harvesting BLE Transmitter with a Micropower Manager Achieving 25% System Efficiency at 0dBm Output and 5.2nW Sleep Power in 28nm CMOS
Jun Yin1, Shiheng Yang1, Haidong Yi1, Wei-Han Yu1, Pui-In Mak1,
Rui P. Martins1,2 University of Macau, Macau, China Instituto Superior Tecnico/University of Lisboa, Lisbon, Portugal 1 2 Massive deployment of wireless sensor tags (e.g. iBeacon) will only happen if batteries and their
ISSCC 2018 Session 28 Wireless
A -76dBm 7.4nW Wakeup Radio with Automatic Offset Compensation
Jesse Moody, Pouyan Bassirian, Abhishek Roy, Ningxi Liu,
Stephen Pancrazio, N. Scott Barker, Benton H. Calhoun, Steven M. Bowers University of Virginia, Charlottesville, VA Event-driven sensor nodes have applications in agriculture, infrastructure, and perimeter monitoring and
ISSCC 2018 Session 28 Wireless
A 14.5mm2 8nW -59.7dBm-Sensitivity Ultrasonic
Wake-Up Receiver for Power-, Area-, and, Interference-Constrained Applications
unobtrusive, distributed mm-sized nodes capable of sensing and communicating information about their surroundings. Wake-up receivers (WuRXs) – ultra-low-power receivers that monitor their environment for a wake-up signat
Angad Singh Rekhi, Amin Arbabian Stanford University, Stanford, CA The
ISSCC 2018 Session 28 Wireless
A 5.8GHz Power-Harvesting 116μm×116μm ″Dielet″ Near-Field Radio with On-Chip Coil Antenna
Bo Zhao, Nai-Chung Kuo, Benyuanyi Liu, Yi-An Li, Lorenzo Iotti, Ali M. Niknejad
would benefit greatly from batteryless compact radios that require no external components. Such a radio could be used for future RFID, wearable/implantable devices, and counter-counterfeit electronics. Previous demonstra
University of California, Berkeley, Berkeley, CA The proliferation of
ISSCC 2018 Session 29 Medical & Bio
Creating Neural “Co-processors” to Explore Treatments for Neurological Disorders
Scott Stanslaski1, Jeffrey Herron1, Elizabeth Fehrmann1, Rob Corey1,
Heather Orser1, Enrico Opri3, Vaclav Kremen2, Ben Brinkmann2, Aysegul Gunduz3, Kelly Foote3, Greg Worrell2, Tim Denison1 Medtronic Neurological Technology, Fridley, MN Mayo Clinic, Rochester, MN 3 University of Florida,
ISSCC 2018 Session 29 Medical & Bio
A Fully Immersible Deep-Brain Neural Probe with Modular Architecture and a Delta-Sigma ADC Integrated Under Each Electrode for Parallel Readout of 144 Recording Sites
Daniel De Dorigo1, Christian Moranz1, Hagen Graf1, Maximilian Marx1,
tissue-penetrating probes for high-density deep-brain recording of in vivo neural activity is limited by the level of electronic integration on the probe shaft. As the number of electrodes increases, conventional devices
Boyu Shui1, Matthias Kuhl1, Yiannos Manoli1,2 University of Freiburg -
ISSCC 2018 Session 29 Medical & Bio
A 16384-Electrode 1024-Channel Multimodal CMOS MEA for High-Throughput Intracellular Action Potential Measurements and Impedance Spectroscopy in Drug-Screening Applications
Carolina Mora Lopez1, Ho Sung Chun1, Laurent Berti2, Shiwei Wang1,
Jan Putzeys1, Carl Van Den Bulcke1,3, Jan-Willem Weijers1, Andrea Firrincieli1, Veerle Reumers1, Dries Braeken1, Nick Van Helleputte1 imec, Heverlee, Belgium Chrysalite, Tervuren, Belgium 3 KU Leuven, Leuven, Belgium 1 2
ISSCC 2018 Session 29 Medical & Bio
A 0.13μm CMOS SoC for Simultaneous Multichannel Optogenetics and Electrophysiological Brain Recording
Gabriel Gagnon-Turcotte, Christian Ethier, Yves De Koninck, Benoit Gosselin
approaches in neuroscience to observe neural microcircuits in vivo [1]. Thereby, brain-implantable devices incorporating optical stimulation and low-noise data acquisition means have been designed based on custom integra
Laval University, Quebec City, Canada Optogenetics and multi-unit elec
ISSCC 2018 Session 29 Medical & Bio
A mm-Sized Free-Floating Wirelessly Powered Implantable Optical Stimulating System-on-a-Chip
Yaoyao Jia1, S. Abdollah Mirbozorgi1, Byunghun Lee1, Wasif Khan2,
cell-type specificity, high spatiotemporal precision, and reversibility, optogenetic neuromodulation has been widely utilized in brain mapping, visual prostheses, psychological disorders, Parkinson's disease, epilepsy, a
Fatma Madi2, Arthur Weber2, Wen Li2, Maysam Ghovanloo1 Georgia Institu
ISSCC 2018 Session 29 Medical & Bio
A 92dB Dynamic Range Sub-μVrms-Noise 0.8μW/ch Neural-Recording ADC Array with Predictive Digital Autoranging
Chul Kim, Siddharth Joshi, Hristos Courellis, Jun Wang, Cory Miller, Gert Cauwenberghs
center left). A two-stage comparator (Fig. 29.6.2 top right) performs 1b quantization. Decision time ranges from 1.5 to 2μs depending on input amplitude, dominated by capacitive loading (CT = 20fF) of the first-stage cur
ISSCC 2018 Session 29 Medical & Bio
A 110dB-CMRR 100dB-PSRR Multi-Channel NeuralRecording Amplifier System Using Differentially Regulated Rejection Ratio Enhancement in 0.18μm CMOS
Sehwan Lee1, Arup K. George1, Taeju Lee2, Jun-Uk Chu3, Sungmin Han4,
Korea 4 Korea Institute of Science and Technology, Seoul, Korea 5 Seoul National University of Science and Technology, Seoul, Korea rails of the amplifier stack, VDD_LNA, VMID and VSS_LNA also tracks VCM, effectively sup
Ji-Hoon Kim5, Minkyu Je2, Junghyup Lee1 Daegu Gyeongbuk Institute of S
ISSCC 2018 Session 29 Medical & Bio
A 43.4μW Photoplethysmogram-Based Heart-Rate Sensor Using Heart-Beat-Locked Loop
Do-Hun Jang, SeongHwan Cho
Photoplethysmogram (PPG) sensors have gained great popularity in recent years as they can easily obtain heart rate (HR) in wearable devices such as smart watches and smart rings. However, one of the biggest problems for
KAIST, Daejeon, Korea
ISSCC 2018 Session 3 Analog Circuits
A Quiet Digitally Assisted Auto-Zero-Stabilized Voltage Buffer with 0.6pA Input Current and 0.6µV Offset
Thije Rooijers, Johan H. Huijsing, Kofi A. A. Makinwa
The readout of high impedance sensors and sampled voltage references [1] requires amplifiers with both low offset and low input current. Chopper amplifiers can achieve low offset, but the switching of their input chopper
Delft University of Technology, Delft, The Netherlands
ISSCC 2018 Session 3 Analog Circuits
A Regulation-Free Sub-0.5V 16/24MHz Crystal Oscillator for Energy-Harvesting BLE Radios with 14.2nJ Startup Energy and 31.8µW Steady-State Power
Ka-Meng Lei1, Pui-In Mak1, Man-Kay Law1, Rui P. Martins1,2
Instituto Superior Tecnico/University of Lisboa, Lisbon, Portugal 1 2 This paper reports a regulation-free sub-0.5V crystal oscillator (XO) for Bluetooth Low-Energy (BLE) radios [1] that can be self-powered by harvesting
University of Macau, Macau, China
ISSCC 2018 Session 3 Analog Circuits
A CMOS Dual-RC Frequency Reference with ±250ppm Inaccuracy from -45°C to 85°C
Çağrı Gürleyük, Lorenzo Pedalà, Fabio Sebastiano, Kofi A. A. Makinwa
To comply with wired communication standards such as USB, SATA and PCI/PCIE, systems-on-chip require frequency references with better than 300ppm accuracy. LC-based references achieve 100ppm accuracy [1], but suffer from
Delft University of Technology, Delft, The Netherlands
ISSCC 2018 Session 3 Analog Circuits
A 2×20W 0.0013% THD+N Class-D Audio Amplifier with Consistent Performance up to Maximum Power Level
Eric Cope, Julian Aschieri, Tony Lai, Franklin Zhao, Walter Grandfield,
Michael Clifford, Pete Rathfelder, Qiyuan Liu, Siddartha Kavilipati, Aaron Vandergriff, Gerald Miaille Qualcomm, Tempe, AZ Conventional Class-D amplifiers, although more power efficient than Class-AB amplifiers, typicall
ISSCC 2018 Session 3 Analog Circuits
A 0.0004% (-108dB) THD+N, 112dB-SNR, 3.15W Fully Differential Class-D Audio Amplifier with Gm Noise Cancellation and Negative Output-Common-Mode Injection Techniques
Wen-Chieh Wang, Yu-Hsin Lin, MediaTek, Hsinchu, Taiwan, Flicker (1/f) noise is a main design issue when realizing a low-
techniques are commonly adopted approaches to mitigate 1/f noise. However, the choppers are seldom used in pulse-width-modulation (PWM) Class-D audio amplifiers (CDAs) because the conventional chopping method applied in
ISSCC 2018 Session 3 Analog Circuits
A 0.96mA Quiescent Current, 0.0032% THD+N, 1.45W Class-D Audio Amplifier with Area-Efficient PWMResidual-Aliasing Reduction
Shih-Hsiung Chien, Yi-Wen Chen, Tai-Haur Kuo
Low quiescent current (IQ) is critical for Class-D audio amplifiers in mobile devices to extend battery usage time [1], since typical audio signals have a high crest factor of 10 to 20dB. In addition, low distortion is a
National Cheng Kung University, Tainan, Taiwan
ISSCC 2018 Session 3 Analog Circuits
A Low-Power 3.25GS/s 4th-Order Programmable Analog FIR Filter Using Split-CDAC Coefficient Multipliers for Wideband Analog Signal Processing
Shinwoong Park1, Dongseok Shin2, Kwang-Jin Koh1, Sanjay Raman1
Discrete-time (DT) circuits provide a means to overcome the analog-circuit design challenges in deeply scaled digital CMOS technologies while benefitting from the reduced switch on-resistance and parasitic capacitance, r
Virginia Tech, Blacksburg, VA; 2Intel, Hillsboro, OR
ISSCC 2018 Session 30 Other
An N40 256K×44 Embedded RRAM Macro with SL-Precharge SA and Low-Voltage Current Limiter to Improve Read and Write Performance
Chung-Cheng Chou, Zheng-Jun Lin, Pei-Ling Tseng, Chih-Feng Li,
due to the simplicity of the RRAM element (RE) and its compatibility with a logic process. A RRAM bit cell (Fig. 30.1.1) consists of an NMOS select transistor and a bipolar RE, which consists of a bottom electrode (BE),
Chih-Yang Chang, Wei-Chi Chen, Yu-Der Chih, Tsung-Yung Jonathan Chang
ISSCC 2018 Session 30 Other
A 1Mb 28nm STT-MRAM with 2.8ns Read Access Time at 1.2V VDD Using Single-Cap Offset-Cancelled Sense Amplifier and In-situ Self-Write-Termination
Qing Dong1,2, Zhehong Wang1, Jongyup Lim1, Yiqun Zhang1,
spin-transfer-torque (STT) MRAM is a promising candidate for nextgeneration high-density embedded non-volatile memory [1-2]. However, 1T1R STT-MRAM suffers from limited sensing margin and high write power. As shown in Fi
Yi-Chun Shih3, Yu-Der Chih3, Jonathan Chang3, David Blaauw1, Dennis Sy
ISSCC 2018 Session 30 Other
A 28nm 32Kb Embedded 2T2MTJ STT-MRAM Macro with 1.3ns Read-Access Time for Fast and Reliable Read Applications
Tzu-Hsien Yang1,2, Kai-Xiang Li1, Yen-Ning Chiang1, Wei-Yu Lin1,
nonvolatile memory (NVM) with a fast read-access time (TAC) and reliable read operations: for applications including data-logging, configurable look-up tables (LUT), eFuse, and physically unclonable functions (PUF). STT-
Huan-Ting Lin1, Meng-Fan Chang1 National Tsing Hua University, Hsinchu
ISSCC 2018 Session 30 Other
A 20ns-Write 45ns-Read and 1014-Cycle Endurance Memory Module Composed of 60nm Crystalline Oxide Semiconductor Transistors
Shuhei Maeda1, Satoru Ohshita1, Kazuma Furutani1, Yuto Yakubo1,
Takahiko Ishizu1, Tomoaki Atsumi1, Yoshinori Ando1, Daisuke Matsubayashi1, Kiyoshi Kato1, Takashi Okuda1, Masahiro Fujita2, Shunpei Yamazaki1 Semiconductor Energy Laboratory, Atsugi, Japan 2 University of Tokyo, Tokyo, J