ISSCC 2022

2022

167 篇论文 · AI / ML (23) · Power Management (21) · RF & Wireless (18) · Data Converters (13) · Digital Circuits (12)

ISSCC 2022 Session 6 Wireline I/O
A 1.41pJ/b 224Gb/s PAM-4 SerDes Receiver with 31dB Loss Compensation
Yoav Segal1, Amir Laufer1, Ahmad Khairi1, Yoel Krupnik1, Marco Cusmai1,
Itamar Levin1, Ari Gordon1, Yaniv Sabag1, Vitali Rahinski1, Gadi Ori1, Noam Familia1, Stas Litski1, Tali Warshavsky1, Udi Virobnik1, Yeshayahu Horwitz1, Ajay Balankutty2, Shiva Kiran2, Samuel Palermo3, Peng Mike Li4, Ari
ISSCC 2022 Session 6 Wireline I/O
A 112.5Gb/s ADC-DSP-Based PAM-4 Long-Reach Transceiver with >50dB Channel Loss in 5nm FinFET
Z. Guo1, A. Mostafa1, A. Elshazly 1, B. Chen1, B. Wang1, C. Han1, C. Wang1,
D. Zhou1, D. Visani1, E. Hsiao1, F. Chu1, F. Lu1, G. Cui1, H. Zhang1, H. Wang1, H. Zhao1, J. Lin1, J. Gu1, L. Luo2, L. Jiang1, M. Singh1, M. Gambhir1, M. Hasan1, M. Wu1, M. J. Yoo1, P. Liu1, S. Kollu1, T. Ye2, X. Zhao2,
ISSCC 2022 Session 6 Wireline I/O
A 2.29pJ/b 112Gb/s Wireline Transceiver with RX 4-Tap FFE for Medium-Reach Applications in 28nm CMOS
Bingyi Ye, Kai Sheng, Weixin Gai, Haowei Niu, Boyang Zhang, Yandong He,
entertainment has never been fulfilled. Mixed-signal PAM-4 transceivers prevail over their ADC-DSP counterparts in energy efficiency and chip area, but they have difficulties operating over high-loss links. Typically, a
Song Jia, Congcong Chen, Jiaqi Yu Peking University, Beijing, China Th
ISSCC 2022 Session 6 Wireline I/O
An 182mW 1-60Gb/s Configurable PAM-4/NRZ Transceiver for Large Scale ASIC Integration in 7nm FinFET Technology
Namik Kocaman1, Ullas Singh1, Bharath Raghavan1, Arvindh Iyer1,
Kumar Thasari1, Saurabh Surana1, Jun Won Jung1, Jaehun Jeong1, Heng Zhang1, Anand Vasani1, Yonghyun Shim1, Zhi Huang1, Adesh Garg1, Hsiang-bin Lee1, Bo Wu2, Feifei Liu1, Ray Wang1, Matthew Loh2, Alex Wang2, Mario Caresos
ISSCC 2022 Session 6 Wireline I/O
A 1.6Tb/s Chiplet over XSR-MCM Channels using 113Gb/s PAM-4 Transceiver with Dynamic Receiver-Driven Adaptation of TX-FFE and Programmable Roaming Taps in 5nm CMOS
G. Gangasani1, D. Hanson1, D. Storaska1, H. H. Xu1, M. Kelly1, M. Shannon1,
M. Sorna1, M. Wielgos1, P. B. Ramakrishna2, S. Shi3, S. Parker1, U. K. Shukla2, W. Kelly1, W. Su3, Z. Yu4 Marvell, Hopewell Junction, NY Marvell, Bangalore, India 3 Marvell, Shanghai, China 4 Marvell, Santa Clara, CA bet
ISSCC 2022 Session 6 Wireline I/O
A 50Gb/s PAM-4 Bi-Directional Plastic Waveguide Link with Carrier Synchronization Using PI-Based Costas Loop
Ha-Il Song1, Hanho Choi1,2, Jun young Yoo1, Hyo-Sup Won1, Cheong Min Lee1,
Huxian Jin1, Tai young Kim1, Woohyun Kwon2, Kyoohyun Lim1, Konan Kwon1, Chang-Ahn Kim1, Taeho Kim1, Jun Gi Jo1, Jake Eu1, Sean Park1, Hyeon-Min Bae2 Point2 technology, Seoul, Korea KAIST, Daejeon, Korea of the I-DCM conv
ISSCC 2022 Session 7 Memory
A 1-Tb 4b/Cell 4-Plane 162-Layer 3D Flash Memory with a 2.4-Gb/s I/O Speed Interface
Jong Yuh1, Jason Li1, Heguang Li1, Yoshihiro Oyama1, Cynthia Hsu1,
Pradeep Anantula1, Stanley Jeong1, Anirudh Amarnath1, Siddhesh Darne1, Sneha Bhatia2, Tianyu Tang1, Aditya Arya1, Naman Rastogi1, Naoki Ookuma1, Hiroyuki Mizukoshi1, Alex Yap1, Demin Wang1, Steve Kim1, Yonggang Wu1, Min
ISSCC 2022 Session 7 Memory
A 1-Tb Density 4b/Cell 3D-NAND Flash on 176-Tier Technology with 4-Independent Planes for Read using CMOS-Under-the-Array
Ted Pekny1, Luyen Vu1, Jeff Tsai1, Dheeraj Srinivasan1, Erwin Yu1,
Jonathan Pabustan1, Joe Xu1, Srinivas Deshmukh1, Kim-Fung Chan1, Michael Piccardi1, Kevin Xu1, Guan Wang1, Kaveh Shakeri1, Vipul Patel1, Tomoko Iwasaki1, Tongji Wang1, Padma Musunuri1, Carl Gu1, Ali Mohammadzadeh1, Ali G
ISSCC 2022 Session 7 Memory
A 1Tb 3b/Cell 8th-Generation 3D-NAND Flash Memory with 164MB/s Write Throughput and a 2.4Gb/s Interface
Moosung Kim, Sung Won Yun, Jungjune Park, Hyun Kook Park, Jungyu Lee,
Yeong Seon Kim, Daehoon Na, Sara Choi, Youngsun Song, Jonghoon Lee, Hyunjun Yoon, Kangbin Lee, Byunghoon Jeong, Sanglok Kim, Junhong Park, Cheon An Lee, Jaeyun Lee, Jisang Lee, Jin Young Chun, Joonsuc Jang, Younghwi Yang
ISSCC 2022 Session 7 Memory
A 512Gb In-Memory-Computing 3D-NAND Flash Supporting Similar-Vector-Matching Operations on Edge-AI Devices
Han-Wen Hu1,2, Wei-Chen Wang1,3, Chung-Kuang Chen1, Yung-Chun Lee1,
Bo-Rong Lin1, Huai-Mu Wang1, Yen-Po Lin1, Yu-Chao Lin1, Chih-Chang Hsieh1, Chia-Ming Hu1, Yi-Ting Lai1, Han-Sung Chen1, Yuan-Hao Chang4, Hsiang-Pang Li1, Tei-Wei Kuo3,5, Keh-Chung Wang1, Meng-Fan Chang2, Chun-Hsiung Hung
ISSCC 2022 Session 8 RF & Wireless
A 0.0078mm2 3.4mW Wideband Positive-Feedback-Based Noise-Cancelling LNA in 28nm CMOS Exploiting Gm Boosting
feedforward paths, whose Gm is 2/RS without the current amplification of CM. When, AgmbiasRS=gm3/(gm2+gm3), the sum of F
γ/(gm2+gm3)RS. Accordingly, the noise factor of the LNA, F can be given by Zhe Liu, Chirn Chye Boon, Chenyang Li, Kaituo Yang, Yangtao Dong, Ting Guo Nanyang Technological University, Singapore, Singapore The noise figur
ISSCC 2022 Session 8 RF & Wireless
A 2-to-2.48GHz Voltage-Interpolator-Based Fractional-N Type-I Sampling PLL in 22nm FinFET Assisting Fast Crystal Startup
Somnath Kundu, Timo Huusari, Hao Luo, Abhishek Agrawal, Eduardo Alban,
Sarah Shahraini, Thao Xiong, Dan Lake, Stefano Pellerano, Jason Mix, Nasser Kurd, Mohamed Abdel-moneum, Brent Carlton Intel, Hillsboro, OR A high-performance clock generator with extremely low jitter, area, and power con
ISSCC 2022 Session 8 RF & Wireless
A 9-to-12GHz Coupled-RTWO FMCW ADPLL with 97fs RMS
Jitter, -120dBc/Hz PN at 1MHz Offset, and with Retrace Time, of 12.5ns and 2µs Chirp Settling Time
Spain 1 2 At the center of autonomous driving and range and motion sensing in industrial and healthcare applications are FMCW RADARs, which provide the means for object range and velocity estimation. With future widespre
Hyman Shanan1, Declan Dalton2, Vamshi Chillara 3, Pablo Dato4 Analog D
ISSCC 2022 Session 9 mm-Wave
Series-Resonance BiCMOS VCO with Phase Noise of -138dBc/Hz at 1MHz Offset from 10GHz and -190dBc/Hz FoM
Alessandro Franceschin, Domenico Riccardi, Andrea Mazzanti
The phase noise of oscillators limits the modulation Error Vector Magnitude (EVM) in wireless communications and the SNR in high-speed data converters. The issue is particularly critical in the wireless infrastructure fo
University of Pavia, Pavia, Italy
ISSCC 2022 Session 9 mm-Wave
A 0.049mm2 7.1-to-16.8GHz Dual-Core Triple-Mode VCO Achieving 200dB FoMA in 22nm FinFET
Jiang Gong1,2, Bishnu Patra3, Luc Enthoven1,2, Job van Staveren1,2,
and an octave frequency-tuning range (FTR) are required for multistandard communication devices, software-defined radios, and wireline data links. A viable popular approach is to exploit multicore mode-switching VCOs for
Fabio Sebastiano1,2, Masoud Babaie1,2 Delft University of Technology,
ISSCC 2022 Session 9 mm-Wave
A 53.6-to-60.2GHz Many-Core Fundamental Oscillator with Scalable Mesh Topology Achieving -136.0dBc/Hz Phase Noise at 10MHz Offset and 190.3dBc/Hz Peak FoM in 65nm CMOS
Haikun Jia, Ruichang Ma, Wei Deng, Zhihua Wang, Baoyong Chi
The millimeter-wave (mm-wave) high-speed wireless communication has placed stringent requirements on the phase-noise performance of the local oscillators (LO), especially when a high-order modulation such as 1024-QAM is
Tsinghua University, Beijing, China
ISSCC 2022 Session 9 mm-Wave
A Highly Power Efficient 2×3 PIN-Diode-Based Intercoupled THz Radiating Array at 425GHz with 18.1dBm EIRP in 90nm SiGe BiCMOS
Sam Razavian, Aydin Babakhani
Efficient THz generation in silicon technologies has been of great interest over the recent years, as it enables an integrated low-cost solution for sensing, radar, communication, and spectroscopy [1]. Due to the limited
University of California, Los Angeles, CA