ISSCC 2020
Session 32
Power Management
A Scalable and PCB-Friendly Daisy-Chain Approach to Parallelize LDO Regulators with 2.613% CurrentSharing Accuracy Using Dynamic Element Matching for Integrated Current Sensing
applications presents a challenge for chip-level thermal management and also tends to be inefficient. Straightforward parallelizing of LDOs to increase output current is a flawed approach since subtle variations between
ISSCC 2010
Session 10
Power Management
A 300mA 14mV-Ripple Digitally Controlled Buck Converter Using Frequency Domain ΔΣ ADC and Hybrid PWM Generator 6415 = ORJ
Digitally controlled DC-DC converters enable design portability as well as reconfigurable compensation and control schemes. Digital controllers are also resistant to process and temperature variations making them attract
ISSCC 2009
Session 23
Clocking & PLLs
A 1MHz-Bandwidth Type-I ∆Σ Fractional-N Synthesizer for WiMAX Applications
Intel, Chandler, AZ 1 2 A major source of close-in phase noise in ∆Σ fractional-N frequency synthesizers is noise-folding due to the nonlinear behavior of the combined phasefrequency detector (PFD)/charge-pump (CP) circu
ISSCC 2009
Session 22
RF & Wireless
A CMOS Adaptive Antenna-Impedance-Tuning IC Operating in the 850MHz-to-2GHz Band
Adaptive antenna-tuning units (AATUs) provide broadband dynamic tuning to widely-varying antenna impedances caused by the changes in operating frequencies and unpredictable environmental factors. AATUs are becoming a cri
ISSCC 2008
Session 24
Analog Circuits
A 10MHz-Bandwidth 2mV-Ripple Regulator for CDMA Transmitters PA-Supply
Polar modulation has been proven to be an effective way to build high-efficiency high-linearity power amplifier systems [1]. In a polar transmitter, high-efficiency non-linear power amplifiers can be used for linearly mo