A 1MHz-Bandwidth Type-I ∆Σ Fractional-N Synthesizer for WiMAX Applications

📋 论文概要

本文提出一种用于WiMAX应用的1MHz带宽Type-I ΔΣ分数N频率合成器，通过采用模拟离散时间PFD和环路滤波器以及误差消除DAC，有效减轻了ΔΣ量化噪声和非线性引起的相位噪声折叠问题。与Type-II PLL相比，该设计显著降低了量化噪声折叠，改善了近端相位噪声和杂散性能。

💡 主要创新点

• 采用模拟离散时间PFD和环路滤波器，替代传统连续时间结构，降低非线性影响。
• 引入误差消除DAC，直接抵消ΔΣ量化误差，减少噪声折叠。
• 采用Type-I PLL架构，避免Type-II中的额外积分器，从而减少量化噪声折叠路径。

🏷 关键词

📄 原文摘要

Intel, Chandler, AZ 1 2 A major source of close-in phase noise in ∆Σ fractional-N frequency synthesizers is noise-folding due to the nonlinear behavior of the combined phasefrequency detector (PFD)/charge-pump (CP) circuit. A fractional-N PLL with an analog discrete-time PFD and loop filter, along with an error cancelling DAC is utilized to alleviate the impact of ∆Σ quantization error and nonlinearities on the phase noise and spurious emissions. In comparison to Type-II PLL, this design suffers less quantization noise folding because the ∆Σ quantization noise goes through phase error transfer function with better linearity. A twostate Type-I loop replaces the more conventional Type-II charge-pump PLLs where a tri-state PFD/CP produces a current proportional to phase error [1]. The Type-I loop shifts the operating point of the phase detector away from the nonlinear region (i.e., close to zero phase error), thus eliminating the need for

👥 作者与机构

Hiva Hedayati1, Bertan Bakkaloglu1, Waleed Khalil2

Arizona State University, Tempe, AZ