Xi’an JiaoTong University — ISSCC 知识库

ISSCC 2026 Session 8 Wireline I/O

A 112Gb/s PAM-4 SBD Transceiver with Mismatch-Compensated 2×VDD Hybrid and Two-Step Echo Canceller in 28nm CMOS

Huanfa Sun, Shangjie Wei, Yu Su, Chenyao Cao, Yujie Zeng, Yukun He, Zhouchi Duan, Guohe Zhang, Xiaoyan Gui

Abstract A 112Gb/s PAM-4 simultaneous bidirectional (SBD) transceiver in 28nm CMOS is presented. It features a hybrid with a 2×VDD stacked driver to restore signal swing, a joint delay and slew-rate matching scheme to el

Xi’an JiaoTong University, Xi’an, China

ISSCC 2025 Session 36 RF & Wireless

A Low-Latency 200Gb/s PAM-4 Heterogeneous Transceiver in 0.13μm SiGe BiCMOS and 28nm CMOS for Retimed Pluggable Optics

Renjie Tang*, Kanan Wang*, Shuyi Xiang, Yu Su, Chenyao Cao, Yukun He, Xiaoyan Gui

intelligence (AI) requires further bandwidth enhancement and has pushed SerDes towards 200G/lane [1]. Linear-drive pluggable optics (LPO) without integrated retimer or digital signal processer (DSP) has drawn great atten

Xi’an JiaoTong University, Xi’an, China *Equally Credited Authors (ECA

ISSCC 2024 Session 19 RF & Wireless

A 0.07mm2 20-to-23.8GHz 8-phase Oscillator Incorporating Magnetic + Dual-Injection Coupling Achieving 189.2dBc/Hz FoM@10MHz and 200.7dBc/Hz FoMA in 65nm CMOS

Ya Zhao*1, Chao Fan*1, Qiuyu Fang1, Guohe Zhang1, Jun Yin2, Pui-in Mak2, Li Geng1

low phase noise (PN) and low phase errors are the cornerstone of high-data-rate wireless transceivers, especially with the increasingly more complex modulation schemes. Frequency division, polyphase ﬁlters, and ring osci

Xi’an JiaoTong University, Xi’an, China University of Macau, Macao, Ch