A 25mA 0.13µm CMOS LDO Regulator with PowerSupply Rejection Better Than −56dB up to 10MHz Using a Feedforward Ripple-Cancellation Technique

📋 论文概要

本文提出一种采用前馈纹波消除技术的LDO稳压器，在0.13µm CMOS工艺下实现25mA输出电流，电源抑制比在10MHz内优于-56dB，解决了高频开关DC-DC转换器后LDO纹波抑制不足的问题。

💡 主要创新点

• 提出前馈纹波消除技术，通过前馈路径抵消电源纹波，显著提高高频PSRR。
• 在0.13µm CMOS工艺中实现了高达10MHz的宽频带高电源抑制比，同时保持低 dropout 电压。
• 通过优化前馈电路设计，在不牺牲负载调整率和瞬态响应的情况下改善纹波抑制性能。

🏷 关键词

📄 原文摘要

block in portable communication systems for power management ICs. The LDO usually comes after a switching DC-DC converter to reduce the output ripples and provide a regulated voltage source for noise-sensitive blocks. For a higher level of integration, there is a need to increase the operating frequency of the switching converters [1]. This necessitates a subsequent LDO regulator with high ripple rejection at frequencies up to several MHz. These LDO regulators should also provide a low drop-out voltage to cope with the low supply voltage of the state-of-the-art CMOS technologies. In addition, due to the feedback nature of the system, the LDO should be stable for a wide range of supply currents while consuming a very low quiescent current. Power-supply rejection (PSR) techniques have been reported by means of

👥 作者与机构

Mohamed El-Nozahi, Ahmed Amer, Joselyn Torres, Kamran Entesari, Edgar Sánchez-Sinencio

Texas A&M University, College Station, TX Low drop-out (LDO) linear regulators have become a key building