A 5mm2 40nm LP CMOS 0.1-to-3GHz Multistandard Transceiver

📋 论文概要

该论文介绍了一款采用40nm LP CMOS工艺、面积为5mm²的多标准收发器，工作频率覆盖0.1至3GHz。通过集成可调中心频率的变压器和精细的增益控制机制，解决了宽频带多标准兼容与高性能发射的挑战。

💡 主要创新点

• 集成三个中心频率可调的变压器，通过共源共栅级联晶体管选择，实现宽频带匹配与覆盖。
• 差分共源共栅预功率放大器（PPA）采用厚氧化物晶体管，提供36dB增益范围（粗调6dB步进、细调1dB步进），满足多标准增益调节需求。

🏷 关键词

📄 原文摘要

Bjorn Debaillie1, Peter Van Wesemael1, Tomohiro Sano2, Takaya Yamamoto3, Dries Hauspie4, Joris Van Driessche1, Jan Craninckx1 quency was therefore limited to 3GHz. The differential mixer’s gain can be lowered over 12dB in 32 steps through a resistive division of the input signal. The PPA is a differential cascoded common-source amplifier. The thick-oxide cascode transistors provide 36dB gain range in coarse/fine steps of 6/1dB by disabling part of the amplifier when needed. The cascode transistors also select one of three integrated transformers with tunable center frequency that span a range from 700MHz up to 2.8GHz. One of the transformers has been bypassed though to provide a wideband differential output. 1 IMEC, Leuven, Belgium Renesas Technology, Itami, Japan 3 Renesas Technology, Takasaki, Japan 4 M4S NV, Leuven, Belgium 2 The trend in wireless communication where terminals give their users ubiquitous access to a multitude of services drives the development of SoftwareDefined Rad

👥 作者与机构

Mark Ingels1, Vito Giannini1, Jonathan Borremans1, Gunjan Mandal1,