A 3.2GHz-Sample-Rate 800MHz Bandwidth Highly Reconfigurable Analog FIR Filter in 45nm CMOS

📋 论文概要

本文提出了一种在45nm CMOS工艺下实现的3.2GHz采样率、800MHz带宽的高可重构模拟FIR滤波器。通过采用高速DAC和可编程二进制加权Gm级，利用深亚微米CMOS快速开关特性，解决了低电压下高性能模拟滤波的难题。

💡 主要创新点

• 实现了3.2GHz采样率和800MHz带宽的高可重构模拟FIR滤波器，突破了深亚微米CMOS下模拟滤波的性能瓶颈。
• 利用45nm CMOS的快速开关特性，采用高速DAC与可编程二进制加权Gm级结构，实现了完全可重构性。
• 在1.1V低电压下工作，同时保持高线性度与宽带宽，展示了先进工艺对模拟电路的提升。

🏷 关键词

📄 原文摘要

hard disk drive and wireless video download, high-order filtering becomes increasingly difficult to realize in deep submicron CMOS technologies. Indeed CMOS transistors suffer from poor analog performances under reduced power supply (lack of gain and linearity). In this context, we present a 3.2GHz-samplerate analog FIR (AFIR) filter that operates from a 1.1V supply and has a maximum bandwidth of 800MHz. Full reconfigurability has been achieved by using a high-speed DAC composed of programmable binary-weighted Gm stages, exploiting the fast switching capability of 45nm CMOS transistors. The AFIR filter disclosed in this work is of a charge-sampling type [1]. Charge sampling enables wideband operation, reduced jitter sensitivity, and embedded

👥 作者与机构

Eoin O’hAnnaidh1,2, Emmanuel Rouat1, Sarah Verhaeren1,

Stéphane Le Tual1, Christophe Garnier1 1 STMicroelectronics, Crolles, France STEricsson, Crolles, France 2 As the demand for more bandwidth keeps growing in many applications such as