⚡ 本页包含 AI 生成的分析内容,仅供参考
该论文提出了一款工作频率为25MHz、功耗仅为7µW/MHz的超低电压微控制器SoC,采用65nm LP/GP CMOS工艺,专门针对低碳无线传感器节点设计。通过优化电路架构和超低电压操作,在降低使用功耗的同时考虑了芯片制造过程中的隐含碳足迹,实现了从生命周期角度的可持续性。
François Durvaux1, Sarah Boyd2, Denis Flandre1, Jean-Didier Legat1 1 2 Université catholique de Louvain, Louvain-la-Neuve, Belgium P.E. International, Berkeley, CA The vision of the Internet of Things with ambient intelligence calls for the deployment of up to a trillion connected wireless sensor nodes (WSNs). Minimizing the carbon footprint of each node is paramount from the sustainability perspective. In ultra-low-power applications, the life-cycle carbon footprint results from a complex balance between both embodied and use-phase energies [1]. The embodied energy arises mainly from CMOS chip manufacturing, and is essentially proportional to die area. Use-phase energy depends on both active and sleep-mode power, because of long stand-by periods in WSNs. In this paper, we present an ultra-low-power 25MHz microcontroller SoC that fully exploits the versatility of a 65nm CMOS process with a low-power/general-purpose (LP/GP)
David Bol1, Julien De Vos1, Cédric Hocquet1, François Botman1,