ISSCC 2012

2012

188 篇论文 · Power Management (22) · Memory (19) · Image Sensors (18) · Data Converters (16) · RF & Wireless (15)

ISSCC 2012 Session 1 Plenary
Flash Memory - the Great Disruptor! Eli Harari
Co-Founder and Former CEO and Chairman (retired),
1.0 Introduction In the past two decades Flash memory grew from a novelty technology to a powerful disruptor that has profoundly transformed consumer electronics and mobile computing. This was made possible through relen
ISSCC 2012 Session 1 Plenary
The Role of Semiconductors in the Energy Landscape Carmelo Papa
Senior Executive VP, Industrial and Multisegment General Manager,
1.0 Introduction Minimizing global consumption of electrical energy is undoubtedly one of the most important challenges facing the world today. According to Exxon Mobil Energy Outlook 2010, economic growth and technologi
ISSCC 2012 Session 1 Plenary
Take the Expressway to go Greener Yoichi Yano
Executive VP, Renesas Electronics, Tokyo, Japan, 1. Introduction
Society is going green! Increasingly, people are committing to choose equipment with lower energy demands. Historically, the growth of green has been repeatedly motivated by various economic upheavals, such as the 1973 o
ISSCC 2012 Session 1 Plenary
Sustainability in Silicon and Systems Development
David Perlmutter, Executive VP/GM
1.0 Introduction Moore’s Law will continue to hold throughout the decade, allowing us to double transistor integration capacity while reducing power, thus providing an abundance of transistors needed to realize novel arc
ISSCC 2012 Session 10 Digital Circuits
A 280mV-to-1.1V 256b Reconfigurable SIMD Vector Permutation Engine with 2-Dimensional Shuffle in 22nm CMOS
Steven Hsu, Amit Agarwal, Mark Anders, Sanu Mathew,
maximizing high-performance microprocessor vector datapath utilization in multimedia, graphics, and signal processing workloads [1-3]. A wide SIMD vector permutation engine is required to achieve high-throughput data rea
ISSCC 2012 Session 10 Digital Circuits
A Source-Synchronous 90Gb/s Capacitively Driven Serial On-Chip Link Over 6mm in 65nm CMOS
Dennis Walter, Sebastian Höppner, Holger Eisenreich, Georg Ellguth,
an ever increasing number of cores in modern MPSoCs, power reduction and meeting on-chip bandwidth requirements are pressing concerns. Energy efficiency can be increased by percore dynamic voltage and frequency scaling (
ISSCC 2012 Session 10 Digital Circuits
A 1.45GHz 52-to-162GFLOPS/W Variable-Precision Floating-Point Fused Multiply-Add Unit with Certainty Tracking in 32nm CMOS
Himanshu Kaul, Mark Anders, Sanu Mathew, Steven Hsu,
blocks of 3D graphics, signal processing and high-performance computing workloads [1,2]. Higher floating-point precisions offer improved accuracy at the expense of performance and energy efficiency, with variable-precisi
ISSCC 2012 Session 10 Digital Circuits
A 2.05GVertices/s 151mW Lighting Accelerator for 3D Graphics Vertex and Pixel Shading in 32nm CMOS
Farhana Sheikh, Sanu Mathew, Mark Anders, Himanshu Kaul,
rendering realistic images in high-throughput 3D graphics pipelines. It is the most performance and power-critical operation in programmable vertex and pixel shaders due to the large number of complex floating-point (FP)
ISSCC 2012 Session 10 Digital Circuits
A 3D System Prototype of an eDRAM Cache Stacked Over Processor-Like Logic Using Through-Silicon Vias
Matt Wordeman1, Joel Silberman1, Gary Maier2, Michael Scheuermann1
IBM Systems and Technology Group, Fishkill, NY 1 2 3D integration (3DI) holds promise for improved performance of integrated systems by increasing interconnect bandwidth [1]. A processor stacked with cache memory is one
ISSCC 2012 Session 10 Digital Circuits
3D-MAPS: 3D Massively Parallel Processor with Stacked Memory
Dae Hyun Kim1, Krit Athikulwongse1, Michael Healy1,
Mohammad Hossain1, Moongon Jung1, Ilya Khorosh1, Gokul Kumar1, Young-Joon Lee1, Dean Lewis1, Tzu-Wei Lin1, Chang Liu1, Shreepad Panth1, Mohit Pathak1, Minzhen Ren1, Guanhao Shen1, Taigon Song1, Dong Hyuk Woo1, Xin Zhao1,
ISSCC 2012 Session 10 Digital Circuits
Centip3De: A 3930DMIPS/W Configurable Near-Threshold 3D Stacked System with 64 ARM Cortex-M3 Cores
David Fick, Ronald G. Dreslinski, Bharan Giridhar, Gyouho Kim,
Sangwon Seo, Matthew Fojtik, Sudhir Satpathy, Yoonmyung Lee, Daeyeon Kim, Nurrachman Liu, Michael Wieckowski, Gregory Chen, Trevor Mudge, Dennis Sylvester, David Blaauw University of Michigan, Ann Arbor, MI Recent high p
ISSCC 2012 Session 10 Digital Circuits
K Computer: 8.162 PetaFLOPS Massively Parallel Scalar Supercomputer Built with Over 548k Cores
Hiroyuki Miyazaki1, Yoshihiro Kusano1, Hiroshi Okano1,
Tatsumi Nakada1, Ken Seki1, Toshiyuki Shimizu1, Naoki Shinjo1, Fumiyoshi Shoji2, Atsuya Uno2, Motoyoshi Kurokawa2 Fujitsu, Kanagawa, Japan RIKEN, Hyogo, Japan 1 2 Many high-performance CPUs employ a multicore architectur
ISSCC 2012 Session 11 Sensors
A ΔΣ Interface for MEMS Accelerometers Using Electrostatic Spring-Constant Modulation for Cancellation of Bondwire Capacitance Drift
Pedram Lajevardi1, Vladimir Petkov2, Boris Murmann1
Robert Bosch, Palo Alto, CA 1 2 Precision accelerometers are used in a variety of automotive applications, navigation systems, and low-level vibration-monitoring systems. Currently, these sensors are factory-calibrated t
ISSCC 2012 Session 11 Sensors
A Capacitance-to-Digital Converter for Displacement Sensing with 17b Resolution and 20µs Conversion Time
Sha Xia, Kofi Makinwa, Stoyan Nihtianov
In precision mechatronic systems, such as wafer steppers, the position of critical mechanical components must be dynamically stabilized with sub-nanometer precision. This can be achieved by a servo loop consisting of a d
ISSCC 2012 Session 11 Sensors
A 50µW Biasing Feedback Loop with 6ms Settling Time for a MEMS Microphone with Digital Output Jeroen van den Boom
NXP Semiconductors, Nijmegen, The Netherlands, A MEMS microphone is a variable capacitor where the distance d between th
compliant membrane and the rigid backplate is proportional to the air (acoustic) pressure. If the charge Q at the plates remains constant, there is a linear relationship between the voltage across the plates and the dist
ISSCC 2012 Session 11 Sensors
ASIC for a Resonant Wireless Pressure-Sensing System for Harsh Environments Achieving ±2% Error Between -40 and 150°C Using Q-Based Temperature Compensation
Marko Rocznik1, Fabian Henrici2, Remigius Has2
increasingly harsh environments such as acid containing gases in vehicle exhausts or exhaust gas recirculation. State-of-the-art gel protection for sensing elements and their electronics is reaching its limit. A circuit’
ISSCC 2012 Session 11 Sensors
A ±0.4°C (3σ) -70 to 200°C Time-Domain Temperature Sensor Based on Heat Diffusion in Si and SiO2
Caspar van Vroonhoven1, Dan D’Aquino2, Kofi Makinwa1
National Semiconductor, Santa Clara, CA 1 2 Despite the increasing use of ICs at very high temperatures (>150°C) in automotive and industrial applications, sensing such temperatures is still mostly done with discrete the
ISSCC 2012 Session 11 Sensors
A Temperature-to-Digital Converter for a MEMSBased Programmable Oscillator with Better Than ±0.5ppm Frequency Stability
Michael Perrott1, Jim Salvia2, Fred Lee3, Aaron Partridge2,
Shouvik Mukherjee2, Carl Arft2, Jin-Tae Kim2, Niveditha Arumugam2, Pavan Gupta2, Sassan Tabatabaei2, Sudhakar Pamarti4, Haechang Lee2, Fari Assaderaghi2 Masdar Institute of Science and Technology, Abu Dhabi, United Arab
ISSCC 2012 Session 11 Sensors
A CMOS Temperature Sensor with a VoltageCalibrated Inaccuracy of ±0.15°C (3σ) From -55 to 125°C
Kamran Souri, Youngcheol Chae, Kofi Makinwa
This paper describes an energy-efficient CMOS temperature sensor intended for use in RFID tags. The sensor achieves an inaccuracy of ±0.15°C (3σ) over the military temperature range (-55 to 125°C) and dissipates only 27n
ISSCC 2012 Session 11 Sensors
Ratiometric BJT-Based Thermal Sensor in 32nm and 22nm Technologies
Joseph Shor, Kosta Luria, Dror Zilberman
Thermal sensors are used in modern microprocessors to provide information for: 1) throttling at the maximum temperature of operation, and 2) fan regulation at temperatures down to 50°C. Today’s microprocessors are therma
ISSCC 2012 Session 12 Digital Processors
A 32nm High-k Metal Gate Application Processor with GHz Multi-Core CPU
Se-Hyun Yang, Seogjun Lee, Jae Young Lee, Jeonglae Cho, Hoi-Jin Lee,
Dongsik Cho, Junghun Heo, Sunghoon Cho, Youngmin Shin, Sunghee Yun, Euiseok Kim, Ukrae Cho, Edward Pyo, Man Hyuk Park, Jae Cheol Son, Chinhyun Kim, Jeongnam Youn, Youngki Chung, Sungho Park, Seung Ho Hwang Samsung Electr
ISSCC 2012 Session 12 Digital Processors
A 335Mb/s 3.9mm2 65nm CMOS Flexible MIMO Detection-Decoding Engine Achieving 4G Wireless Data Rates
Markus Winter1, Steffen Kunze1, Esther Perez Adeva1, Björn Mennenga1,
Emil Matûs1, Gerhard Fettweis1, Holger Eisenreich1, Georg Ellguth1, Sebastian Höppner1, Stefan Scholze1, René Schüffny1, Tomoyoshi Kobori2 Technical University Dresden, Dresden, Germany NEC, Tokyo, Japan 1 2 In current a
ISSCC 2012 Session 12 Digital Processors
A Full 4-Channel 6.3Gb/s 60GHz Direct-Conversion Transceiver with Low-Power Analog and Digital Baseband Circuitry
Kenichi Okada1, Keitarou Kondou2, Masaya Miyahara1,
Masashi Shinagawa2, Hiroki Asada1, Ryo Minami1, Tatsuya Yamaguchi1, Ahmed Musa1, Yuuki Tsukui1, Yasuo Asakura2, Shinya Tamonoki2, Hiroyuki Yamagishi2, Yasufumi Hino2, Takahiro Sato1, Hironori Sakaguchi1, Naoki Shimasaki1
ISSCC 2012 Session 12 Digital Processors
A 320mW 342GOPS Real-Time Moving Object Recognition Processor for HD 720p Video Streams
Jinwook Oh, Gyeonghoon Kim, Junyoung Park, Injoon Hong,
unmanned aerial vehicles (UAVs) and mobile augmented reality that require robust and fast recognition in the presence of dynamic camera noise. Devices in such applications suffer from severe motion/camera blur noise in l
ISSCC 2012 Session 12 Digital Processors
A 464GOPS 620GOPS/W Heterogeneous Multi-Core SoC for Image-Recognition Applications
Yasuki Tanabe, Masato Sumiyoshi, Manabu Nishiyama, Itaru Yamazaki,
popular recently in a variety of industries such as automotive, surveillance, and others. SoCs for such image recognition applications are required to be powerful enough to support real-time multiple object recognition,
ISSCC 2012 Session 12 Digital Processors
A 2Gpixel/s H.264/AVC HP/MVC Video Decoder Chip for Super Hi-Vision and 3DTV/FTV Applications
Dajiang Zhou1, Jinjia Zhou1, Jiayi Zhu2, Peilin Liu2, Satoshi Goto1
Shanghai Jiao Tong University, Shanghai, China 1 2 8K×4K Super Hi-Vision (SHV) offers a significantly enhanced visual experience relative to 1080p, and is on its way to being the next digital TV standard. In addition, ad
ISSCC 2012 Session 13 Memory
A 4.6GHz 162Mb SRAM Design in 22nm Tri-Gate CMOS Technology with Integrated Active VMIN-Enhancing Assist Circuitry
Eric Karl, Yih Wang, Yong-Gee Ng, Zheng Guo, Fatih Hamzaoglu,
reduced power consumption, which motivates the pursuit of high-performance at reduced operating voltages. Random and systematic device variations pose significant challenges to SRAM VMIN and low-voltage performance as te
ISSCC 2012 Session 13 Memory
A 6T SRAM with a Carrier-Injection Scheme to Pinpoint and Repair Fails That Achieves 57% Faster Read and 31% Lower Read Energy
Kousuke Miyaji1, Toshikazu Suzuki2, Shinji Miyano2, Ken Takeuchi1
Semiconductor Technology Academic Research Center, Yokohama, Japan 1 2 Decreasing operating margins due to random variations is a key issue for voltage scaling in SRAM technology. It is particularly severe for half-selec
ISSCC 2012 Session 13 Memory
Capacitive-Coupling Wordline Boosting with SelfInduced VCC Collapse for Write VMIN Reduction in 22-nm 8T SRAM
Jaydeep Kulkarni, Bibiche Geuskens, Tanay Karnik,
embedded memory arrays used as register files and low-level caches that typically share the same supply voltage as the core [1]. The desire for wide voltage range operation to optimize power and performance dictates the
ISSCC 2012 Session 13 Memory
A 28nm 360ps-Access-Time Two-Port SRAM with a Time-Sharing Scheme to Circumvent Read Disturbs°
Yuichiro Ishii1, Yasumasa Tsukamoto1, Koji Nii1,
growth in the market for mobile information terminals such as smart phones and tablets, the performance of image processing engines (e.g., operation speed, accuracy in digital images) has improved remarkably. In these pr
ISSCC 2012 Session 14 Digital Circuits
A 0.004mm2 250µW ΔΣ TDC with Time-Difference Accumulator and a 0.012mm2 2.5mW Bang-Bang Digital PLL Using PRNG for Low-Power SoC Applications
Jong-Phil Hong, Sung-Jin Kim, Jenlung Liu, Nan Xing,
clock and timing generators are in high demand to avoid complex analog operations and to meet stringent phase noise requirements. There have been several approaches to convert analog systems to their digital counterparts
ISSCC 2012 Session 14 Digital Circuits
A 1.5GHz 890µW Digital MDLL with 400fsrms
Integrated Jitter, -55.6dBc Reference Spur and, 20fs/mV Supply-Noise Sensitivity Using 1b TDC
implemented using digital phase-locked loops (DPLLs), are evolving as the preferred means for synthesizing on-chip clocks. Their main benefits include small area, reduced sensitivity to analog circuit imperfections, and
ISSCC 2012 Session 14 Digital Circuits
A 6.7MHz-to-1.24GHz 0.0318mm2 Fast-Locking All-Digital DLL in 90nm CMOS
Min-Han Hsieh, Liang-Hsin Chen, Shen-Iuan Liu, Charlie Chung-Ping Chen
synchronization in high performance digital systems. The design of analog DLLs has become a challenge due to the trends associated with CMOS scaling, namely, high leakage current, low supply voltage, etc. Consequently, m
ISSCC 2012 Session 14 Digital Circuits
A TDC-Less ADPLL with 200-to-3200MHz Range and 3mW Power Dissipation for Mobile SoC Clocking in 22nm CMOS
Nathaniel August, Hyung-Jin Lee, Martin Vandepas, Rachael Parker
Mobile SoC designs demand a low-power clocking system to maximize battery life. The host PLL is critical since it must remain enabled to support always-on, always-connected operation. In addition, the host PLL should off
ISSCC 2012 Session 14 Digital Circuits
A Digitally Stabilized Type-III PLL Using Ring VCO with 1.01psrms Integrated Jitter in 65nm CMOS
Akihide Sai, Yuka Kobayashi, Shigehito Saigusa, Osamu Watanabe, Tetsuro Itakura
control gain, KVCO, increases the phase noise contribution arising from the charge pump and loop filter. To resolve this problem, dual-tuning PLLs (DT-PLLs) have been studied [1-4]. The DT-PLL structure adds a narrow-ban
ISSCC 2012 Session 15 mm-Wave
A 1kPixel CMOS Camera Chip for 25fps Real-Time Terahertz Imaging Applications
Hani Sherry1,2,3, Janusz Grzyb2, Yan Zhao2, Richard Al Hadi2,
shield surrounding each pixel. This layout symmetry enabled a wide-band radially symmetric antenna pattern. The silicon die (15Ω-cm resistivity) was thinned down to 150µm and active layers were selectively blocked to min
ISSCC 2012 Session 15 mm-Wave
A 4-Path 42.8-to-49.5GHz LO Generation with Automatic Phase Tuning for 60GHz Phased-Array Receivers
Liang Wu, Alvin Li, Howard Luong
Millimeter-Wave (MMW) phased-array receivers are used not only to overcome the large path loss and thus to relax the link budget but also to electrically steer the beam direction to suppress unwanted signals. Each elemen
ISSCC 2012 Session 15 mm-Wave
280GHz and 860GHz Image Sensors Using SchottkyBarrier Diodes in 0.13µm Digital CMOS
Ruonan Han1,2, Yaming Zhang3, Youngwan Kim3, Dae Yeon Kim3,
sub-millimeter-wave imaging using solid-state circuits is gaining attention for security and medical applications. To lower cost and increase integration, MOSFETs in CMOS are being investigated for implementing broadband
ISSCC 2012 Session 15 mm-Wave
A 0.28THz 4×4 Power-Generation and Beam-Steering Array
Kaushik Sengupta, Ali Hajimiri
Up until recently, the terahertz frequency range (0.3 to 3THz) has been mostly addressed by high-mobility custom III-V processes, bulky and expensive nonlinear optics, or cryogenically cooled quantum cascade lasers. A lo
ISSCC 2012 Session 15 mm-Wave
A 283-to-296GHz VCO with 0.76mW Peak Output Power in 65nm CMOS
Yahya M. Tousi, Omeed Momeni, Ehsan Afshari
Sub-mm-Wave and terahertz frequencies have many applications such as medical imaging, spectroscopy and communication systems. CMOS signal generation at this frequency range is a major challenge due to the limited cut-off
ISSCC 2012 Session 15 mm-Wave
A 1V 19.3dBm 79GHz Power Amplifier in 65nm CMOS
Kun-Yin Wang, Tao-Yao Chang, Chorng-Kuang Wang
For a highly integrated wireless system including on-chip antennas, high-outputpower power amplifiers (PA) are required to cover the desired transmission range. In order to achieve the output power level, power-combining
ISSCC 2012 Session 15 mm-Wave
A 9% Power Efficiency 121-to-137GHz PhaseControlled Push-Push Frequency Quadrupler in 0.13µm SiGe BiCMOS
Yong Wang1,2, Wang Ling Goh1, Yong-Zhong Xiong2,3
Institute of Microelectronics, Singapore, Singapore 3 MicroArray Technologies, Chengdu, China 1 2 High-data-rate short-range communication and image systems beyond 100GHz impose crucial requirements on signal sources, de
ISSCC 2012 Session 15 mm-Wave
A 144GHz 0.76cm-Resolution Sub-Carrier SAR Phase Radar for 3D Imaging in 65nm CMOS
Adrian Tang1, G. Virbila1, D. Murphy1, F. Hsiao1, Y.H. Wang1, Q. J. Gu2,
Z. Xu3, Y. Wu4, M. Zhu1, Mau-Chung Frank Chang1 University of California, Los Angeles, Los Angeles, CA 2 University of Florida, Gainsville, FL 3 HRL, Malibu, CA 4 Northrop Grumman Aerospace Systems, Los Angeles, CA 1 Mil
ISSCC 2012 Session 15 mm-Wave
A 2Gb/s-Throughput CMOS Transceiver Chipset with In-Package Antenna for 60GHz Short-Range Wireless Communication
Toshiya Mitomo, Yukako Tsutsumi, Hiroaki Hoshino, Masahiro Hosoya,
Tong Wang, Yuta Tsubouchi, Ryoichi Tachibana, Akihide Sai, Yuka Kobayashi, Daisuke Kurose, Tomohiko Ito, Koichiro Ban, Tomoya Tandai, Takeshi Tomizawa Toshiba, Kawasaki, Japan High-speed and energy-efficient wireless com
ISSCC 2012 Session 15 mm-Wave
A Low-Power 57-to-66GHz Transceiver in 40nm LP CMOS with -17dB EVM at 7Gb/s
Vojkan Vidojkovic1, Giovanni Mangraviti1,2, Khaled Khalaf1,2,
Viki Szortyka1,2, Kristof Vaesen1, Wim Van Thillo1, Bertrand Parvais1, Mike Libois1, Steven Thijs1, John R. Long3, Charlotte Soens1, Piet Wambacq1,2 imec, Heverlee, Belgium Vrije Universiteit Brussel, Brussel, Belgium 3
ISSCC 2012 Session 16 Power Management
Near-Independently Regulated 5-Output Single-Inductor DC-DC Buck Converter Delivering 1.2W/mm2 in 65nm CMOS
Chien-Wei Kuan, Hung-Chih Lin
For minimizing the power consumption in portable devices, efficient DC-DC converters with a wide range of regulated voltages and currents are needed. Considering the required footprint area, cost, and chip count, integra
ISSCC 2012 Session 16 Power Management
A High-Stability Emulated Absolute Current Hysteretic Control Single-Inductor 5-Output Switching DC-DC Converter with Energy Sharing and Balancing
Se-Won Wang1, Gyu-Ha Cho2, Gyu-Hyeong Cho1
JDA, Daejeon, Korea 1 2 Several types of DC-DC converters for active-matrix organic LED (AMOLED) displays have been introduced to date [1-4]. Single-inductor multiple-output (SIMO) converters with current-mode control ha
ISSCC 2012 Session 16 Power Management
Off-the-Line Primary-Side Regulation LED Lamp Driver with Single-Stage PFC and TRIAC Dimming Using LED Forward-Voltage and Duty-Variation Tracking Control
Jong Tae Hwang, Moon Sang Jung, Dae Ho Kim, Jun Hong Lee,
terms of efficiency and lower fabrication cost. However, some areas such as bar-typed fluorescent lamp retrofit applications still require a solution with isolation. Even for replacement of the incandescent and compact f
ISSCC 2012 Session 16 Power Management
A 0.18µm CMOS 91%-Efficiency 0.1-to-2A Scalable Buck-Boost DC-DC Converter for LED Drivers
Piero Malcovati1, Massimiliano Belloni1, Fabio Gozzini2,
Several emerging portable applications require high-efficiency LED drivers [1-4]. An LED driver is basically a current source that forces the current required for achieving the desired light emission into the LED. In ord
ISSCC 2012 Session 16 Power Management
A 92%-Efficiency Wide-Input-Voltage-Range Switched-Capacitor DC-DC Converter
Vincent Ng, Seth Sanders
The traditional inductor-based buck converter has been the dominant design for step-down switched-mode voltage regulators for decades. Switched-capacitor (SC) DC-DC converters, on the other hand, have traditionally been