A 280mV-to-1.1V 256b Reconfigurable SIMD Vector Permutation Engine with 2-Dimensional Shuffle in 22nm CMOS

📋 论文概要

本文提出了一种在22nm CMOS工艺下实现的280mV至1.1V宽电压工作、256位可重构SIMD向量置换引擎，通过32条目×256b多端口寄存器文件和256b字节任意置换交叉开关，支持二维shuffle操作，解决了高性能处理器中向量数据重排的高吞吐量和能效问题。

💡 主要创新点

• 实现了4路至32路可重构SIMD向量置换，支持宽电压范围（280mV-1.1V）以适应不同能效需求
• 采用256b字节级任意置换交叉开关和二维shuffle架构，实现灵活高效的数据重排，提升多媒体和信号处理性能

🏷 关键词

📄 原文摘要

maximizing high-performance microprocessor vector datapath utilization in multimedia, graphics, and signal processing workloads [1-3]. A wide SIMD vector permutation engine is required to achieve high-throughput data rearrangement operations on large data sets, with scaled supply voltages to deliver high energy efficiency. An ultralow-voltage reconfigurable 4-way to 32-way SIMD vector permutation engine consisting of a 32-entry × 256b 3-read/1-write ported register file with a 256b byte-wise any-to-any permute crossbar for 2-dimensional shuffle is fabricated in 22nm CMOS. The register file integrates a vertical shuffle across multiple entries into read/write operations, and includes clockless static reads with shared P/N dual-ended transmission gate (DETG) writes, improving register file VMIN by

👥 作者与机构

Steven Hsu, Amit Agarwal, Mark Anders, Sanu Mathew,

Himanshu Kaul, Farhana Sheikh, Ram Krishnamurthy Intel, Hillsboro, OR Energy-efficient SIMD permutation operations are key for