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本文提出了一种14位扩展计数模数转换器，应用于2400万像素APS-C CMOS图像传感器中，通过列并行架构和过采样技术实现高分辨率成像。解决了传统列并行ADC在精度和速度之间的权衡问题。
Won-ho Choi, Yun-jung Kim, Chang-eun Kang, Ji-hun Shin, Kyo-jin Choo, Won-baek Lee, Jin-kyeong Heo, Byung-jo Kim, Se-jun Kim, Min-ho Kwon, Kwi-sung Yoo, Jin-ho Seo, Seog-heon Ham, Chi-young Choi, Gab-soo Han Samsung Electronics, Yongin, Korea The demand for high-quality and high-speed imaging has increased. Columnparallel ≥14b A/D conversion is one of the major approaches to meet these requirements in CMOS image sensors (CIS). Oversampling ADCs such as incremental delta-sigma (I-ΔΣ) ADCs are the solution for a high-resolution ADC having tolerance of analog component errors. Oversampling reduces input temporal noise as well as the quantization error of the ADC itself [1]. However, an I-ΔΣ ADC is also classified as a slow ADC because it requires exponential conversion time to get higher bit resolution. To reduce conversion time, there are two alternative methods: 1) higher-order modulation, and 2) two-step conversion such as
Jae-hong Kim, Wun-ki Jung, Seung-hyun Lim, Yu-jin Park,