A Low-Power 57-to-66GHz Transceiver in 40nm LP CMOS with -17dB EVM at 7Gb/s

📋 论文概要

该论文提出了一种在40nm LP CMOS工艺中实现的57-66GHz低功耗收发器，覆盖IEEE 802.15.3c和802.11ad标准的四个1.76GHz带宽信道，在7Gb/s速率下实现了-17dB的EVM，解决了此前收发器仅能覆盖1-2个信道的局限性。

💡 主要创新点

• 首次在40nm LP CMOS中实现覆盖全频段（57-66GHz）的收发器，支持四个IEEE 802.11ad信道，相比之前仅支持1-2个信道有显著提升。
• 通过低功耗架构设计，在7Gb/s高速率下仍能保持-17dB的低EVM，适合QAM16等复杂调制。

🏷 关键词

📄 原文摘要

Viki Szortyka1,2, Kristof Vaesen1, Wim Van Thillo1, Bertrand Parvais1, Mike Libois1, Steven Thijs1, John R. Long3, Charlotte Soens1, Piet Wambacq1,2 imec, Heverlee, Belgium Vrije Universiteit Brussel, Brussel, Belgium 3 Delft University of Technology, Delft, The Netherlands 1 2 Obtaining sufficient EVM in all four 1.76GHz bandwidth channels specified by IEEE 802.15.3c and the emerging 802.11ad high-data-rate wireless communication standards for modulations as complex as QAM16 is a challenge. Recently reported implementations are therefore restricted to just 1 or 2 channels [1]. Wireless applications often use digital low-power (LP) CMOS technology to implement single-chip transceivers. The high Vt and the thin metal interconnect layers constrain the mm-Wave circuit performance. This paper presents a digital LP 40nm CMOS 60GHz transceiver (TRX) IC that obtains an EVM better than -17dB in all 4 channels.

👥 作者与机构

Vojkan Vidojkovic1, Giovanni Mangraviti1,2, Khaled Khalaf1,2,