A 1.45GHz 52-to-162GFLOPS/W Variable-Precision Floating-Point Fused Multiply-Add Unit with Certainty Tracking in 32nm CMOS

📋 论文概要

该论文提出了一种在32nm CMOS工艺下、工作频率1.45GHz的可变精度浮点融合乘加单元，能够在52至162GFLOPS/W的能效范围内运行。通过引入实时确定性跟踪技术，该单元在低精度模式下实现高能效，同时在高精度模式下保持准确性，解决了传统浮点单元在精度与能效之间无法动态平衡的问题。

💡 主要创新点

• 提出可变精度浮点融合乘加(FMA)架构，支持运行时精度选择，实现单周期吞吐量。
• 引入实时确定性跟踪(certainty tracking)机制，在低精度操作时自动降低能耗，同时保证高精度结果的准确性。

🏷 关键词

📄 原文摘要

blocks of 3D graphics, signal processing and high-performance computing workloads [1,2]. Higher floating-point precisions offer improved accuracy at the expense of performance and energy efficiency, with variable-precision floating-point circuits providing run-time precision selection [3]. Real-time certainty tracking enables variable-precision circuits not only to operate at the higher energy efficiency of low-precision datapaths, but also to preserve high-precision accuracy. A variable-precision floating-point unit that performs fused multiply-adds (FMA) with single-cycle throughput while supporting operation in either 1-way single-precision (24b mantissa), 2-way 12b precision or 4-way 6b precision modes is fabricated in 32nm High-k/Metal-gate CMOS [4]. Simultaneous floating-point certainty tracking, preshifted addends, a combined rounding

👥 作者与机构

Himanshu Kaul, Mark Anders, Sanu Mathew, Steven Hsu,

Amit Agarwal, Farhana Sheikh, Ram Krishnamurthy, Shekhar Borkar Intel, Hillsboro, OR High-throughput floating-point computations are key building