A 33Mpixel 120fps CMOS Image Sensor Using 12b Column-Parallel Pipelined Cyclic ADCs

📋 论文概要

本文面向下一代超高清电视（Super Hi-Vision）系统，提出了一款33M像素、120fps的CMOS图像传感器，采用12位列并行流水线循环ADC架构，实现了高分辨率与高帧率的兼顾。

💡 主要创新点

• 实现33M像素（7680×4320）@120fps的超高分辨率和高帧率成像。
• 采用12位列并行流水线循环ADC，在保持高精度的同时支持高速列级转换。

🏷 关键词

📄 原文摘要

Tomohiko Kosugi3, Tomoyuki Akahori3, Tetsuya Iida3, Keigo Isobe3, Takashi Watanabe3, Hiroshi Shimamoto1, Hiroshi Ohtake1, Satoshi Aoyama3, Shoji Kawahito2,3, Norifumi Egami1 NHK Science & Technology Research Laboratories, Tokyo, Japan Shizuoka University, Hamamatsu, Japan 3 Brookman Technology, Hamamatsu, Japan 1 2 There has been increasing demand for high-reality video systems. Thus, there has been research and development into ultra-high-definition television (UDTV) schemes for the next-generation television broadcasting system called “Super Hi-Vision” (SHV). This system aims to improve viewing experience using higher-resolution pictures. A pixel count of 7680×4320 and frame rate of 120fps are defined as full-spec parameter values for the SHV video signal. The total pixel data output rate of full-spec SHV image sensors will be 48Gb/s or greater. Several image sensors have been developed for UDTV or digital cinema applications [1-4], but they still do not fulfill SHV specifications.

👥 作者与机构

Toshihisa Watabe1, Kazuya Kitamura1, Takehide Sawamoto2,