A 2.05GVertices/s 151mW Lighting Accelerator for 3D Graphics Vertex and Pixel Shading in 32nm CMOS

📋 论文概要

该论文提出了一种在32nm CMOS工艺下实现的2.05GVertices/s、151mW的照明加速器，用于3D图形顶点和像素着色中的高性能照明计算。通过硬件加速单周期吞吐量的照明计算，显著提升了几何渲染的能效和性能。

💡 主要创新点

• 采用单周期吞吐量的硬件加速器架构，实现高速照明计算
• 针对顶点和像素着色器中的复杂浮点运算进行优化，在不牺牲性能的前提下大幅降低功耗
• 在32nm CMOS节点下实现了2.05GVertices/s的高吞吐量和151mW的低功耗设计

🏷 关键词

📄 原文摘要

rendering realistic images in high-throughput 3D graphics pipelines. It is the most performance and power-critical operation in programmable vertex and pixel shaders due to the large number of complex floating-point (FP) multiplications and exponentiations [1]. Performance and energy-efficiency of geometry rendering can be significantly improved by hardware acceleration of lighting computations, which is leveraged by vertex/pixel shader programs residing in the memory of a programmable 3D graphics engine [2] (Fig. 10.4.1). A single-cycle throughput lighting accelerator targeted for on-die acceleration of 3D graphics vertex and pixel shading in high-performance processors and mobile SoCs is fabricated in 32nm high-k metal-gate CMOS [3] (Fig. 10.4.1). Ambient, diffuse, and specular components of the Phong Illumination (PI) equation [4] are computed in p

👥 作者与机构

Farhana Sheikh, Sanu Mathew, Mark Anders, Himanshu Kaul,

Steven Hsu, Amit Agarwal, Ram Krishnamurthy, Shekhar Borkar Intel, Hillsboro, OR Advanced lighting computation is the key ingredient for