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本文提出一款单芯片H.264/AVC HP/MVC视频解码器，支持8K×4K超高清视频和最多32路HD视点的实时解码（2Gpixel/s吞吐率）。针对视频编码算法中数据依赖性限制硬件并行度的关键挑战，设计了高效架构，实现了超高清和3DTV/FTV应用的实时解码。
Shanghai Jiao Tong University, Shanghai, China 1 2 8K×4K Super Hi-Vision (SHV) offers a significantly enhanced visual experience relative to 1080p, and is on its way to being the next digital TV standard. In addition, advanced 3DTV specifications involving a large number of camera views are targeted by emerging applications such as free-viewpoint TV (FTV). This paper presents a single-chip design that supports real-time H.264 decoding of SHV or up to 32 HD views. The design of the chip involved 3 key challenges: 1) Data dependencies of video coding algorithms restrict the degree of hardware parallelism. For SHV, each macroblock (MB) should be processed in less than 40 cycles at 300MHz, which is difficult to meet with a single pipeline; 2) due to the massive design and verification effort for video decoders, a scalable architecture that allows the maximum reuse of existing IP is desirable; and 3) the DRAM
Dajiang Zhou1, Jinjia Zhou1, Jiayi Zhu2, Peilin Liu2, Satoshi Goto1
Waseda University, Kitakyushu, Japan