⚡ 本页包含 AI 生成的分析内容，仅供参考
本文提出一种位线电容抵消感测方案，用于提高嵌入式非易失性存储器的读取速度，解决了汽车微控制器中存储器读取延迟瓶颈。该方案在65nm工艺下实现了11ns的读取延迟和2.9GB/s的最大读取吞吐量。
Christian Peters1, Christoph Parzinger1, Christoph Roll1, Stephan Kassenetter1, Stefanie Thierold1, Doris Schmitt-Landsiedel2 Infineon, Neubiberg, Germany, 2Technical University Munich, Munich, Germany 1 The markets trends in the automotive industry of efficiency, safety and standardization, demand an increase in system performance (e.g., system frequency or by using multi core architectures) in microcontrollers for automotive powertrain applications. Since embedded nonvolatile memory is an essential part of such an SoC, the memory read speed must increase at the same rate to achieve best possible overall system performance. A further trend is that memory size is increasing with every new technology node to support complex algorithms required for real-time automotive applications. Larger memory sizes lead typically to an increase of the bitline (BL) capacitance, which is one of the most critical parameters for read performance of a memory array.
Mihail Jefremow1,2, Thomas Kern1, Ulrich Backhausen1,