A 0.5V 4Mb Logic-Process Compatible Embedded Resistive RAM (ReRAM) in 65nm CMOS Using LowVoltage Current-Mode Sensing Scheme with 45ns Random Read Time

📋 论文概要

该论文提出了一种在65nm CMOS工艺中实现的0.5V 4Mb嵌入式电阻式RAM（ReRAM），解决了低电压下传统非易失性存储器因电荷泵电路写电压不足和缺乏低电压电流模式读出放大器而导致的读取裕度、速度和电压余量问题。

💡 主要创新点

• 提出了一种低电压电流模式读出放大器（CSA），能够在0.5V VDD下克服读取裕度不足和速度下降的问题。
• 实现了与逻辑工艺兼容的嵌入式ReRAM，适用于能量采集供电设备和生物医学应用等低功耗场景。

🏷 关键词

📄 原文摘要

mobile chips, such as energy-harvestingpowered devices and biomedical applications, require low-VDD on-chip nonvolatile memory (NVM) for low-power active-mode access and power-off data storage. However, conventional NVMs cannot achieve low-VDD operation due to insufficient write voltage generated by charge-pumped (CP) circuits at a low VDD, and a lack of low-VDD current-mode sense amplifiers (CSA) [1-4] to overcome read issues in reduced sensing margins, degraded speeds, and insufficient voltage headroom (VHR). Resistive RAM (ReRAM) [4-6] is a promising memory with the advantages of short write time, low write-voltage, and reduced write power compared to Flash and other NVMs. Using a low-VDD CP with relaxed output voltage/current requirements for write operations, ReRAM is a good candidate for on-chip low-

👥 作者与机构

Meng-Fan Chang1, Che-Wei Wu1, Chia-Cheng Kuo1, Shin-Jang Shen1,

Ku-Feng Lin2, Shu-Meng Yang1, Ya-Chin King1, Chorng-Jung Lin1, Yu-Der Chih2 National Tsing Hua University, Hsinchu, Taiwan TSMC, Hsinchu, Taiwan 1 2 Numerous low-supply-voltage (VDD)