A 256×256 CMOS Image Sensor with ΔΣ-Based Single-Shot Compressed Sensing

📋 论文概要

本文提出了一种基于ΔΣ调制的单次压缩感知CMOS图像传感器，实现了256×256像素阵列。通过将压缩感知与ΔΣ调制结合，在单次采样中完成压缩，显著降低了ADC采样数和功耗，解决了传统压缩无法减少ADC功耗的问题。

💡 主要创新点

• 将ΔΣ调制与压缩感知技术融合，实现单次采样的图像压缩，避免了全分辨率ADC转换。
• 在256×256像素阵列上验证了该方案，有效降低了图像传感器的整体功耗。

🏷 关键词

📄 原文摘要

Sony, Atsugi, Japan 1 2 Low power consumption is a primary concern in many CMOS image-sensor applications. As the resolution of these sensors has increased while maintaining or increasing their frame rates, A/D conversion has become the dominant component of power consumption [1]. Conventional image compression can help reduce the readout rate [2] (and hence its power consumption), but cannot reduce the A/D conversion power consumption, since it is performed after all pixel values have been converted to the digital domain. Compressed sensing (CS), e.g., see [3], promises to reduce the ADC sampling rate without adversely affecting signal recoverability. The basic premise is that if a signal can be efficiently represented using only a few coefficients in some transform domain, then it can be recovered using a much smaller number of random linear measurements than the number of samples dictated by the

👥 作者与机构

Yusuke Oike1,2, Abbas El Gamal1

Stanford University, Stanford, CA