A 20Mb/s Phase Modulator Based on a 3.6GHz Digital PLL with -36dB EVM at 5mW Power

📋 论文概要

该论文提出了一种基于3.6GHz数字锁相环的20Mb/s相位调制器，通过直接频率调制和两点注入方案实现宽带相位调制，解决了4G无线标准（如WiMAX）对噪声和带宽的苛刻要求。在5mW功耗下实现了-36dB的误差矢量幅度（EVM）。

💡 主要创新点

• 采用数字锁相环结合直接频率调制和两点注入方案，实现了宽带相位调制，带宽约为信道带宽的10倍。
• 通过精细的频率分辨率和线性VCO设计，在低功耗下满足了4G无线标准的噪声和带宽要求。

🏷 关键词

📄 原文摘要

Polar or outphasing radio transmitter architectures promise higher efficiency than their Cartesian counterparts [1], but require the adoption of phase modulators with bandwidth about one order of magnitude wider than the channel bandwidth. In contrast to phase-switching approaches [2], efficient implementations of wideband phase modulators are based on the direct frequency modulation (FM) of a PLL and on the two-point signal-injection scheme [3]. Unfortunately, meeting the noise/bandwidth requirements of 4G wireless standards (such as WiMAX) demands fine frequency resolution, tight VCO linearity and accurate synchronization between the two signals injected into the PLL. This paper introduces a digital-intensive phase modulator circuit, which is able to enforce an arbitrary carrier phase change (up to ±π radians) in one clock sample. For a clock frequency of 40MHz, the modulation error, expressed in terms of error vector magnitude (EVM), is below -36dB for a 20Mb/s QPSK-modulated or a

👥 作者与机构

Giovanni Marzin, Salvatore Levantino, Carlo Samori, Andrea Lacaita

Politecnico di Milano, Milan, Italy