⚡ 本页包含 AI 生成的分析内容，仅供参考
该论文提出一种新的10GBASE-T模拟前端（AFE）架构，采用单个DAC和线路驱动器替代传统的多个DAC配置，解决了多DAC匹配难题，并显著改善了回波抵消线性度。实现低于2W的功耗。
Ramesh Singh1, Hesam Aslanzadeh1, Alireza Khalili1, Saurabh Vats1, Susan Arno1, Sean Campeau2 Applied Micro, Sunnyvale, CA Applied Micro, Kanata, ON, Canada 1 2 The IEEE802.3an 10GBase-T standard [1] provides full duplex transmission and reception over 4 twisted pairs in a 100M UTP cable. Earlier AFE implementations for this standard have utilized a transmitter hybrid configuration requiring multiple DACs with stringent inter-DAC matching requirements [2-3]. This paper describes a new AFE architecture using a single DAC and line-driver to achieve better echo-cancellation linearity. The design achieves >59dB TX SFDR and >68dB echo-cancellation (EC) SFDR across 400MHz bandwidth. The AFE receiver circuitry consists of PGA and 2× time-interleaved SHA-less 11b pipelined ADC operating at 800MS/s. Measured receive noise floor and SFDR is <-144dBm/Hz and >53dB, respectively. The AFE dissipates less than 2W power, occupies
Tarun Gupta1, Frank Yang1, Dong Wang1, Ali Tabatabaei1,