⚡ 本页包含 AI 生成的分析内容，仅供参考
该论文提出了一种采用19nm工艺的128Gb 3b/Cell NAND闪存，通过工艺微缩和电路技术创新，实现了18MB/s的写速率和400Mb/s的Toggle模式接口，显著提高了存储密度和读写性能。
Nima Mokhlesi1, Cynthia Hsu1, Jason Li1, Venky Ramachandra1, Teruhiko Kamei1, Masaaki Higashitani1, Tuan Pham1, Mitsuaki Honma2, Yoshihisa Watanabe2, Kazumi Ino2, Binh Le1, Byungki Woo1, Khin Htoo1, Tai-Yuan Tseng1, Long Pham1, Frank Tsai1, Kwang-ho Kim1, Yi-Chieh Chen1, Min She1, Jong Yuh1, Alex Chu1, Chen Chen1, Ruchi Puri1, Hung-Szu Lin1, Yi-Fang Chen1, William Mak1, Jonathan Huynh1, Jim Chan1, Mitsuyuki Watanabe1, Daniel Yang1, Grishma Shah1, Pavithra Souriraj1, Dinesh Tadepalli1, Suman Tenugu1, Ray Gao1, Viski Popuri1, Behdad Azarbayjani1, Ravindra Madpur1, James Lan1, Emilio Yero1, Feng Pan1, Patrick Hong1, Jang Yong Kang1, Farookh Moogat1, Yupin Fong1, Raul Cernea1, Sharon Huynh1, Cuong Trinh1, Mehrdad Mofidi1, Ritu Shrivastava1, Khandker Quader1 Sandisk, Milpitas, CA Toshiba Semiconductor, Yokohama, Japan 1 2 Since the first 3b/cell (X3) NAND flash memory paper in ISSCC 2008 [1], market demand for applications using high-density low-cost flash memory such as
Yan Li1, Seungpil Lee1, Ken Oowada1, Hao Nguyen1, Qui Nguyen1,