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ISSCC 2012Session 2 · HIGH BANDWIDTH DRAM & PRAMMemory20nm

A 20nm 1.8V 8Gb PRAM with 40MB/s Program Bandwidth

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📋 论文概要

该论文采用20nm工艺实现了一款8Gb相变随机存取存储器(PRAM),在1.8V供电电压下实现了40MB/s的编程带宽,解决了高密度非易失存储器的速度瓶颈问题。

💡 主要创新点

核心指标
40MB/s Program Bandwidth, 8Gb容量, 1.8V
工艺节点
20nm
重要性
发表年份
ISSCC 2012

🏷 关键词

PRAM相变存储器40MB/s编程带宽20nm工艺8Gb密度

📄 原文摘要

Sanghoan Chang, Beakhyoung Cho, Jinyoung Kim, Younghoon Oh, Duckmin Kwon, Jung Sunwoo, Junho Shin, Yoohwan Rho, Changsoo Lee, Min Gu Kang, Jaeyun Lee, Yongjin Kwon, Soehee Kim, Jaehwan Kim, Yong-Jun Lee, Qi Wang, Sooho Cha, Sujin Ahn, Hideki Horii, Jaewook Lee, Kisung Kim, Hansung Joo, Kwangjin Lee, Yeong-Taek Lee, Jeihwan Yoo, Gitae Jeong Samsung Electronics, Hwasung, Korea Phase-change random access memory (PRAM) is considered as one of the most promising candidates for future memories because of its good scalability and cost-effectiveness [1]. Besides implementations with standard interfaces like NOR flash or LPDDR2-NVM, application-oriented approaches using PRAM as main-memory or storage-class memory have been researched [2-3]. These studies suggest that noticeable merits can be achieved by using PRAM in improving power consumption, system cost, etc. However, relatively low chip density and insufficient write bandwidth of PRAMs are obstacles to better system performance. In this pa

👥 作者与机构

Youngdon Choi, Ickhyun Song, Mu-Hui Park, Hoeju Chung,

分类:Memory · 年份:ISSCC 2012