⚡ 本页包含 AI 生成的分析内容，仅供参考
本文提出了一种用于60GHz频段的低功耗四元件相控阵QPSK收发器，集成了缝隙环天线以降低封装和测试成本。通过电路堆叠技术和整体优化，实现了50mW发射功耗和65mW接收功耗，为短距离多Gb/s无线链路提供了低成本方案。
The 60GHz band has gained great interest as an enabler for multi-Gb/s wireless links. Recent efforts [1-4] have focused on reducing transceiver power to drive adoption of 60GHz in mobile devices. To further accelerate this adoption, the cost of current mm-Wave solutions should also be reduced. Especially for short range designs (<1m), overall cost may be dominated by packaging and testing. This paper therefore presents a low-power 60GHz CMOS 4-element phasedarray QPSK transceiver with integrated slot-loop antennas. Utilizing such antennas as well as circuit stacking techniques, the transceiver achieves 10.4Gb/s with a range of >40cm in all directions while consuming only 115mW (TX+RX). Due to their planar nature, on-chip antennas generally have non-isotropic radiation patterns in the end-fire direction, which would greatly limit the range of the system in some directions (Fig. 13.3.1). Fortunately, on-chip antennas also provide easy access to multiple drive points, and can hence be rec
Lingkai Kong, Dongjin Seo, Elad Alon
University of California, Berkeley, CA