A Self-Duty-Cycled and Synchronized UWB Receiver SoC Consuming 375pJ/b for -76.5dBm Sensitivity at 2Mb/s

📋 论文概要

该论文提出了一种自占空比和同步的超宽带（IR-UWB）接收机SoC，通过基于时钟数据恢复（CDR）的位级占空比技术解决了接收机同步和功耗挑战。实现了375pJ/b的能效和-76.5dBm的灵敏度，数据速率为2Mb/s。

💡 主要创新点

• 提出了一种全位级占空比的IR-UWB接收机架构，实现自同步和低功耗运行。
• 采用基于CDR的同步机制，无需额外的高频参考时钟，降低了系统复杂度。

🏷 关键词

📄 原文摘要

Novel highly networked applications with severe energy constraints such as tag and body-area networks, for ubiquitous object networking [1] or the ‘Internet of Things’ are driving the need for ultra-low-power wireless data links that operate over a short range and with a relatively low data rate. Impulse radio UWB (IRUWB) has shown unique promise for these applications; however, the synchronization and bit-level duty cycling of the receiver have remained a significant challenge. In this work, we present a fully bit-level-duty-cycled IR-UWB receiver SoC with a clock-and-data-recovery(CDR)-based synchronization for demodulation and self-duty cycling. The SoC contains the full receiver from RF signal in to clocked digital data bits out. State-of-the-art IR-UWB receivers that support links over meters or decameters consume 1.3nJ/bit to 2.5nJ/bit [2-5]. Our receiver achieves 0.375nJ/bit—a 3.5 to 7 fold improvement—by (1) exploiting the ability to do low-power, all-digital

👥 作者与机构

Baradwaj Vigraham, Peter Kinget

Columbia University, New York, NY