A Programmable 0.7-to-2.7GHz Direct ΔΣ Receiver in 40nm CMOS

📋 论文概要

该论文提出了一种工作在0.7-2.7GHz频段的直接ΔΣ接收机，采用40nm CMOS工艺实现，旨在将ADC靠近天线以简化射频前端。它解决了可编程射频接收机对宽调谐范围、低噪声、高阻塞容忍度和低功耗的需求。

💡 主要创新点

• 采用直接ΔΣ调制架构，将模数转换器靠近天线，实现可编程的射频前端。
• 在0.7-2.7GHz宽带范围内实现可调谐，同时保持低噪声和阻塞容忍能力。

🏷 关键词

📄 原文摘要

programmable receivers, ideally placing the analog-to-digital converter (ADC) right at the antenna. Such an RF ADC should be tunable over several GHz, have programmable gain, low noise, be blocker-tolerant, and consume minimal power. As an attempt to satisfy these requirements, delta-sigma (ΔΣ) modulation close to the antenna interface has been proposed in both bandpass

👥 作者与机构

Mikko Englund1, Kim B. Östman1, Olli Viitala1, Mikko Kaltiokallio1,

Kari Stadius1, Kimmo Koli2, Jussi Ryynänen1 Aalto University, Espoo, Finland, 2Ericsson, Turku, Finland 1 The software-defined radio paradigm calls for increasingly digital-intensive