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ISSCC 2014Session 9 · LOW-POWER WIRELESSWireless65nm CMOS

A 1.3mW 0.6V WBAN-Compatible Sub-Sampling PSK Receiver in 65nm CMOS

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📋 论文概要

本文提出了一种适用于无线体域网(WBAN)的亚采样PSK接收机,采用65nm CMOS工艺,在0.6V供电下仅消耗1.3mW功耗。通过数字密集型架构替代传统模拟密集型设计,解决了高功耗和大面积的问题。

💡 主要创新点

工艺节点
65nm CMOS
重要性
发表年份
ISSCC 2014

🏷 关键词

WBAN亚采样PSK接收机低功耗65nm CMOS

📄 原文摘要

Fudan University, Shanghai, China 1 2 The release of the IEEE802.15.6 standard has led to increased interest in lowpower technologies for wireless body-area-networks (WBAN). The power dissipation, supply voltage, and IC area are some of the most important criteria for successful WBAN implementations. Analog-intensive heterodyne receivers (RX) have been previously demonstrated, consuming 4 to 5mW of power from a 1-to-1.2V supply while occupying large silicon area, due to the presence of area-intensive analog building blocks such as low-pass filters at the IF [1,2]. Digital-intensive RX architectures can potentially result in sub-1V operation with significant reductions in power consumption and area, but require system and circuit-level innovations to achieve desired sensitivity and linearity. This paper presents a mostly-digital 2.4GHz RX architecture that uses a sub-sampling technique with digital IF/baseband signal processing to enable low-power

👥 作者与机构

Jiao Cheng1, Nan Qi1, Patrick Yin Chiang1,2, Arun Natarajan1

Oregon State University, Corvallis, OR

分类:Wireless · 年份:ISSCC 2014