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本文提出了一种60V高压自归零与斩波精密运算放大器，采用800kHz交叠时钟和输入偏置电流修调技术，解决了高压CMOS工艺下运放失调电压漂移和1/f噪声问题。通过结合自归零和斩波技术，实现了高精度、低噪声的工业级性能。
widely used to support industrial, instrumentation, and other applications [1]. Most of them have been realized with BJT or JFET processes [1] to offer voltage noise PSD better than 10nV/√Hz and offset voltage drift better than 1μV/°C. Recently, opamps with similar specifications have become available using CMOS based processes [2-4], which can offer a cheaper wafer price. Auto-zeroing and/or chopping are used as essential techniques to reduce offset voltage drift and 1/f noise associated with CMOS input differential pairs. The switching action of those techniques, however, results in unwanted output ripples and glitches, which requires a post-filter and limits usable signal bandwidth. Increasing the switching frequency can extend the usable signal bandwidth, though it introduces DC errors such as offset voltage drift and input bias current. Maximum offset voltage drift of 0.02μV/°C and an input bias current of 600pA
Analog Devices, San Jose, CA, Precision operational amplifiers (opamp) with 30V supply operation have been