⚡ 本页包含 AI 生成的分析内容，仅供参考
该论文设计了一款支持GSM/EDGE/HSPA+/TDSCDMA/LTE多模多频段的收发器芯片，采用40nm CMOS工艺，芯片面积仅13mm²。通过高度集成的架构和先进的电路技术，解决了多标准兼容与小型化的矛盾，满足了LTE系统对更高数据速率和更多功能的需求。
Iason Vassiliou1, Charalampos Kapnistis1, Yiannis Kokolakis1, Hamed Peyravi1, Gerasimos Theodoratos1, Konstantinos Vryssas1, Nikos Kanakaris1, Christos Kokozidis1, Spyros Kavadias1, Sofoklis Plevridis1, Paul Mudge2, Igor Elgorriaga2, Aris Kyranas1, Spyridon Liolis1, Eleni Kytonaki1, Giorgos Konstantopoulos1, Pavlos Robogiannakis1, Kosmas Tsilipanos1, Michael Margaras1, Panagiotis Betzios1, Rahul Magoon2, Ilias Bouras1, Maryam Rofougaran2, Reza Rofougaran2 Broadcom, Athens, Greece, 2Broadcom, Irvine, CA 1 To support increased device functionality and higher data-rates in LTE-enabled systems, while improving user experience and usage time, there is a need to reduce RFIC size and power consumption without degrading performance, while maintaining backward compatibility with legacy 2G/3G systems [1]. This paper introduces a 13mm2, 40nm CMOS 2G/HSPA+/TDSCDMA/LTE cat. 4 transceiver that consumes 36/65mA battery-referenced current in 3G/LTE20 modes (B1,
Theodore Georgantas1, Kostis Vavelidis1, Nikos Haralabidis1, Stamatis Bouras1,