A 94.6%-Efficiency Fully Integrated SwitchedCapacitor DC-DC Converter in Baseline 40nm CMOS Using Scalable Parasitic Charge Redistribution

📋 论文概要

该论文提出了一种在40nm CMOS工艺中实现的全集成开关电容DC-DC转换器，通过可扩展的寄生电荷共享技术解决了片上电源转换效率低的问题，实现了94.6%的峰值效率。

💡 主要创新点

• 提出可扩展的寄生电荷共享技术，有效减少开关电容转换器中的寄生损耗。
• 在基线40nm CMOS工艺中实现全集成DC-DC转换器，无需外部元件，适用于片上电源管理。

🏷 关键词

📄 原文摘要

In recent years, there has been an ever-increasing interest in monolithic power supplies. Integrating the power supply with the application has many direct benefits, including a reduction of the bill of materials and reduced size. Even more substantial are the potential efficiency gains due to reduced power delivery network losses and voltage margins, especially in a world dominated by energy limited devices where this translates directly into improved battery life. However, to warrant a migration to integrated power supplies, it is crucial that these gains do not get eclipsed by the decreased efficiency of the power converter caused by the reduced quality of integrated passives. Switched-Capacitor (SC) converters have become more and more popular because, contrary to inductive converters, they only use transistors and capacitors, both of which are native to CMOS technologies and scale well into deep-submicron nodes. The maximal efficiency

👥 作者与机构

Nicolas Butzen, Michiel Steyaert

KU Leuven, Leuven, Belgium