A Self-Calibrated 10Mb/s Phase Modulator

📋 论文概要

该论文提出了一种基于分数N子采样PLL的自校准相位调制器，通过查找表（LuT）和误差符号积分技术实时校准非线性，实现了10Mb/s数据率和-37.4dB EVM。解决了宽带相位调制中INL误差导致的线性度问题。

💡 主要创新点

• 提出一种自校准技术，利用查找表和误差符号积分在PLL运行中动态更新系数，消除相位调制器的INL误差。
• 基于10.1-12.4GHz分数N子采样PLL实现宽带低噪声相位调制，同时达到-246.6dB FOM。
• 在10Mb/s数据率下实现-37.4dB EVM，验证了自校准方案的有效性。

🏷 关键词

📄 原文摘要

-246.6dB-FOM, Fractional-N Subsampling PLL Nereo Markulic1,2, Kuba Raczkowski1, Ewout Martens1, Pedro Emiliano Paro Filho1,2, Benjamin Hershberg1, Piet Wambacq1,2, Jan Craninckx1 imec, Leuven, Belgium, Vrije Universiteit Brussel, Brussels, Belgium 1 integrating the scaled Error Sign value to the appropriate address (defined with the input code) in every cycle. When the calibration is initialized, the LuT is reset to zero. While the PLL operates, the coefficients c(0:k-1) slowly change towards their optimal calibrated values that cancel the INL error. At that moment, the coefficient updating can be disabled. The algorithm convergence speed is determined by the tap gain G, where a typical value of 2-15 results in 100ms approximate calibration time. Importantly, the DAC INL calibration uses an additional differentiator on the Error Sign (a=1 for DAC, but a=0 for DTC INL calibration) before the application to the LuT. This serves to compensate for the

👥 作者与机构

with -37.4dB EVM Based on a 10.1-to-12.4GHz,