⚡ 本页包含 AI 生成的分析内容，仅供参考
该论文提出了一种全集成3:1开关电容DC-DC转换器，采用28nm CMOS工艺，实现了1.1W/mm²的功率密度和82%的效率。解决了片上电源传输网络损耗大的问题，通过高电压转换比减少电流消耗。
Over the past years, delivering power to integrated circuits has become increasingly difficult. With the current intake of many modern-day applications growing each new process generation, the Power Delivery Network (PDN) losses have increased as well. By integrating a DC-DC converter together with the load, part of the required voltage conversion can be realized on-chip, and the current intake, together with the PDN losses, can thus ideally be reduced by its Voltage Conversion Ratio (VCR). In order to be viable, though, the converter must 1) have a high efficiency and VCR such that its losses are smaller than the reduction of PDN losses, 2) limit the area overhead by achieving high power density and 3) rely only on commonly available devices to enable wide-spread use. Switched-Capacitor (SC) converters in particular are a promising candidate for integration. However, the limited monolithic capacitor density has been a burden,
Nicolas Butzen, Michiel Steyaert
KU Leuven, Leuven, Belgium