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ISSCC 2017Session 5 · ANALOG TECHNIQUESAnalog Circuits

A 5×80W 0.004% THD+N Automotive Multiphase Class-D Audio Amplifier with Integrated Low-Latency ΔΣ ADCs for Digitized Feedback after the Output Filter problem, a special low-latency ΔΣ ADC (LLADC) is proposed with lowpass filtering DACs (FIRDACs) in its feedback path. By giving the digital filter the same transfer function as the FIRDAC, the overall signal transfer function (STF) becomes approximately flat with little phase shift, while HF quantization noise is reduced.

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📋 论文概要

本文提出了一款适用于汽车音响系统的5通道80W多相D类音频放大器,集成了低延迟ΔΣ模数转换器用于数字化反馈,实现了0.004%的总谐波失真加噪声性能。通过采用多相架构和低延迟ADC,解决了传统D类放大器在汽车环境中高功率、低失真和低延迟的挑战。

💡 主要创新点

核心指标
5×80W输出功率,0.004% THD+N
重要性
发表年份
ISSCC 2017

🏷 关键词

多相D类放大器低延迟ΔΣ ADC汽车音频低失真

📄 原文摘要

Remko van Heeswijk1, Marto-Jan Koerts1, Eric van Iersel1, Daniel Groeneveld2, Gertjan van Holland1, Patrick Zeelen1, Derk-Jan Hissink1, Martin Pos1, Paul Wielage1, Fre Jorritsma1, Marc Klein Middelink1 The ADC core (Fig. 5.1.3) consists of two 1b noise-shaping loops that convert both CM and DM input signals. Resistors between the load and the ADC provide V/I conversion and level-shifting, such that the ADC can be implemented in the low-voltage high-density CMOS part of the process. The DM FIRDAC uses 466 switching current filter taps, clocked at 50MHz to approximate a 2nd-order lowpass transfer with a corner at fC=60kHz, which enables 48dB reduction of HF quantization noise in the reconstruction filter, while the overall STF has a BW of 1MHz. Clip detection and recovery mechanisms are added to the DM FIRDAC to prevent overload instability and dither is injected to suppress tonal limit cycles.

👥 作者与机构

Fred Mostert1, Daniel Schinkel1,2, Wouter Groothedde2, Lucien Breems3,

分类:Analog Circuits · 年份:ISSCC 2017