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ISSCC 2017Session 5 · ANALOG TECHNIQUESAnalog Circuits

A 1A LDO Regulator Driven by a 0.0013mm2 Class-D Controller

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📋 论文概要

该论文提出了一种由0.0013mm²的D类控制器驱动的1A LDO稳压器,解决了传统模拟LDO在高负载电流下需要高静态电流驱动大功率晶体管,以及数字LDO控制电路面积随功率晶体管增大而增加的问题。

💡 主要创新点

核心指标
1A负载电流,0.0013mm²控制器面积
重要性
发表年份
ISSCC 2017

🏷 关键词

LDO稳压器D类控制器低静态电流

📄 原文摘要

Marvell, Santa Clara, CA A low-dropout (LDO) regulator generates a DC supply for electronic systems. Today’s high-throughput wireless system-on-chips (SOCs) require large dynamic range of supply current, which demands a high current capacity LDO. The power transistor of the LDO scales up with the maximum load current. A conventional analog LDO consumes high quiescent current to drive the large power transistor for loop stability [2]. For a digital LDO, the control circuits increase with the size of the power transistor, which results in more area overhead and design complexity [4]. A Class-D driven LDO with a distributed-gate-resistance power transistor is proposed to achieve low quiescent current, low output ripple and small silicon area at the same time. This paper presents a 1.8V-to-1.2V input, 1.05V-output LDO with 1A load capacity. Figure 5.10.1 compares the different control methods of the LDO regulator. An

👥 作者与机构

Weiwei Xu, Prasanna Upadhyaya, Xiaoyue Wang, Randy Tsang, Li Lin

分类:Analog Circuits · 年份:ISSCC 2017