Frequency-Locked-Loop Ring Oscillator with 3ns Peak-to-Peak Accumulated Jitter in 1ms Time Window for High-Resolution Frequency Counting

📋 论文概要

该论文提出一种基于频率锁定环（FLL）的环形振荡器，用于高分辨率频率测量应用。通过在1ms时间窗口内实现3ns峰峰值累积抖动，解决了由于功率循环和转换时间限制导致的频率测量精度问题。

💡 主要创新点

• 采用频率锁定环架构替代传统锁相环，避免了鉴相器和电荷泵等复杂电路，降低抖动
• 通过优化环形振荡器设计，在长时间窗口（1ms）内实现了3ns峰峰值的极低累积抖动

🏷 关键词

📄 原文摘要

Many sensing applications require a high-resolution frequency measurement. These applications include measurement of pressure, acceleration and eddycurrent sensing. In these applications the sensor is part of an oscillator circuit where the physical quantity being measured is represented by a frequency. In most of these applications the supply current is dictated by the SNR requirements, therefore in order to save power, power cycling is used with a minimum conversion time. For an accurate frequency measurement this conversion time is limited by the time resolution and the accumulated jitter of the reference clock

👥 作者与机构

Karthik Pappu, George Pieter Reitsma, Sumant Bapat

Texas Instruments, Santa Clara, CA