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ISSCC 2018Session 9 · WIRELESS TRANSCEIVERS AND TECHNIQUESWireless65nm CMOS

A Highly Reconfigurable 65nm CMOS RF-to-Bits Transceiver for Full-Band Multicarrier TDD/FDD 2G/3G/4G/5G Macro Basestations

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📋 论文概要

提出一种高度可重构的65nm CMOS RF-to-bits收发器,支持2发2收,覆盖400MHz至6GHz LO频率,用于全频段多载波TDD/FDD 2G/3G/4G/5G宏基站。该收发器具有200MHz大信号带宽和450MHz DPD合成/观测带宽,并支持满足GSM基站动态范围要求的低中频FDD模式,解决了多标准、多频段基站的高集成度和可重构性问题。

💡 主要创新点

核心指标
200MHz large-signal BW, 450MHz DPD BW, LO 400MHz-6GHz
工艺节点
65nm CMOS
重要性
发表年份
ISSCC 2018

🏷 关键词

可重构收发器RF-to-bits宏基站多载波TDD/FDD

📄 原文摘要

Manish J. Manglani3, Haiyang Zhu4, David Alldred5, Zhao Li5, Steven R. Bal1, Jianxun Fan1, Oliver E. Gysel1, Christopher M. Mayer2, Tony Montalvo1 Analog Devices, Raleigh, NC Analog Devices, Norwood, MA 3 Analog Devices, Greensboro, NC 4 Analog Devices, Wilmington, MA 5 Analog Devices, Toronto, Canada 1 2 This paper presents a 65nm 2-TX, 2-RX RF-to-bits basestation transceiver with 200MHz large-signal BW and 450MHz DPD synthesis/observation BW, and LO frequencies from 400MHz to 6GHz. For FDD operation the TRX supports a lowIF mode that meets the dynamic range requirements of GSM basestations. It provides full-band multicarrier (MC) operation in all TDD/FDD 3GPP bands for 2G/3G/4G/5G radios. The SoC includes an 8×16Gb/s SERDES interface, two receivers, two transmitters, and a digital pre-distortion (DPD) feedback RX (FBRX) (Fig. 9.3.1). The FBRX employs a “stitching” system that combines the outputs

👥 作者与机构

David J. McLaurin1, Kevin G. Gard1, Richard P. Schubert2,

分类:Wireless · 年份:ISSCC 2018