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ISSCC 2019Session 18 · ANALOG TECHNIQUESAnalog Circuits

A -105dBc THD+N (-114dBc HD2) at 2.8VPP Swing and 120dB DR Audio Decoder with Sample-and-Hold Noise Filtering and Poly Resistor Linearization Schemes

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📋 论文概要

该论文提出了一种高保真音频解码器,通过采样保持噪声滤波和Poly R技术,解决了DAC参考噪声限制SNR、大输出摆幅下THD+N退化以及高负载电容导致的放大器环路增益失真问题。实现了-105dBc THD+N(-114dBc HD2)在2.8Vpp摆幅和120dB DR的性能。

💡 主要创新点

核心指标
-105dBc THD+N (-114dBc HD2) @ 2.8Vpp swing, 120dB DR
重要性
发表年份
ISSCC 2019

🏷 关键词

音频解码器THD+N采样保持噪声滤波

📄 原文摘要

Three major design issues that arise for high-fidelity audio decoders are: 1) DAC reference noise limiting achievable SNR [1,2]; 2) THD+N degradation at large output swing [3,4]; and 3) Distortion arising from limited amplifier loop gain as a consequence of high output load capacitance (CL) [5]. In the first issue, reference noise along with individual DAC cell noise generally limits SNR for a full-scale signal. The use of large device sizes [1], source degeneration [2] and chopping can mitigate 1/f noise, but none are effective for reducing thermal noise. Consequently, either more power or an external bypass capacitor for noise filtering is necessary for reducing DAC reference noise. In the second issue, THD+N of high-output-swing amplifiers degrades proportionally as the output swing increases above 1.6VPP, even with a 4.5V supply [3,4]. The primary cause of this severe 2nd-order harmonic distortion (HD2) is due to the depletion effect of poly

👥 作者与机构

Shon-Hang Wen, Kuan-Dar Chen, Chuan-Hung Hsiao, Ya-Chi Chen

MediaTek, Hsinchu, Taiwan

分类:Analog Circuits · 年份:ISSCC 2019